Patents
Literature
Hiro is an intelligent assistant for R&D personnel, combined with Patent DNA, to facilitate innovative research.
Hiro

46results about How to "Improve production process yield" patented technology

Method for manufacturing semiconductor device patterned structure

The invention discloses a method for manufacturing a semiconductor device patterned structure. The method includes the steps of firstly, sequentially forming a target layer, a first mask layer and a first patterned mask layer on a substrate, then using the first patterned mask layer as an etching mask, forming a plurality of feature structures on the substrate, wherein each feature structure comprises a first patterned mask layer and a patterned target layer, forming a second patterned mask on the substrate so as to cover a part of the feature structures and expose a preset region, carrying out a second etching manufacturing process, completely eliminating the feather structures in the preset region and the position, in the preset region, of the second patterned mask, finally, carrying out a third etching manufacturing process, using the first pattering mask layers as etching masks, and completely eliminating the positions, which are not covered by the first patterned mask layers, of the target layer.
Owner:UNITED MICROELECTRONICS CORP

Manufacturing method for embedded type semiconductor package piece of element

The invention discloses a manufacturing method for an embedded type semiconductor package piece of an element. A metal substrate is provided. A metal layer is formed on the metal substrate and coats the metal substrate. The metal layer is provided with the upper surface, the lower surface and the first side surface, wherein the upper surface and the lower surface are mutually opposite and are connected through the first side surface. A patterning photo-resist layer is formed on the metal layer, and a part of the upper surface and a part of the lower surface are exposed out of the patterning photo-resist layer. A plurality of connecting pads are formed on the portion, exposed out of the patterning photo-resist layer, of the upper surface and the portion, exposed out of the patterning photo-resist layer, of the lower surface, and the patterning photo-resist layer coats second side surfaces of the connecting pads. The second side surfaces of the connecting pads are exposed after the patterning photo-resist layer is removed. A plurality of electronic elements are arranged on the connecting pads. An insulation layer is pressed on the metal layer in a combination mode and coats the electronic elements, the connecting pads and a part of the metal layer.
Owner:TRIPOD WUXI ELECTRONICS

Manufacturing method of buried word line

The invention discloses a manufacturing method of a buried word line. The manufacturing method comprises the steps of providing a substrate firstly, wherein the substrate comprises a plurality of shallow trench isolation parts; next, forming a plurality of first patterned material layers which are positioned above the substrate, wherein a first groove is included between any two adjacent first patterned material layers; next, forming at least one second patterned material layer which is positioned in the first groove; by taking each first patterned material layer and the second patterned material layer as a mask layer, performing a first etching step; and forming a plurality of second grooves at least in the shallow trench isolation parts and the substrate.
Owner:UNITED MICROELECTRONICS CORP +1

Clean production process of m-carbamidoaniline hydrochloride

The invention discloses a clean production process of m-carbamidoaniline hydrochloride. The clean production process comprises the following steps of: dissolving m-phenylenediamine into a sodium chloride salt water reaction system; adding an auxiliary agent into the reaction system; controlling a reaction temperature at -5 DEG C to 25 DEG C; then adding sodium cyanate and hydrochloric acid for reaction; and after the reaction is completed, carrying out post-treatment on a resulting substance to obtain m-carbamidoaniline hydrochloride, wherein the auxiliary agent is nitric acid or nitrate. According to the clean production process, salt water, instead of pure water, is used as base water, m-carbamidoaniline hydrochloride produced in the reaction can be separated out in time by using salt precipitation effects of sodium chloride, a byproduct diurea is not generated, the purity of the obtained m-carbamidoaniline hydrochloride is more than 98%, the yield is more than 95%, the content is 75%-80%, the sewage quantity is reduced by 50%, and the process is simple and high in automation degree.
Owner:ZHEJIANG RUNTU INST

Thermoelectric module and manufacture method thereof

The invention discloses a thermoelectric module and a manufacture method of the thermoelectric module. The thermoelectric module comprises a first base plate, a second base plate, a plurality of P type thermoelectric materials, a plurality of N type thermoelectric materials, first metal electrodes, second metal electrodes, first welding alloy layers, second welding alloy layers and a support object, wherein the thermoelectric materials are arranged between the first base plate and the second base plate and each pair of thermoelectric materials comprises a P type thermoelectric material and an N type thermoelectric material which are electrically connected through the first metal electrode (positioned between the first base plate and the lower end surface of the thermoelectric materials), and the N type thermoelectric material is then electrically connected with the other adjacent P type thermoelectric material through the second metal electrode (positioned between the second base plate and the upper end surface of the thermoelectric materials). The first welding alloy layers are connected with the first metal electrodes and the lower end surfaces of the P / N type thermoelectric materials, and the second welding alloy layers are connected with the second metal electrodes and the upper end surfaces of the P / N type thermoelectric materials. The support object is positioned in a position of at least one of the first welding alloy layers and the second welding alloy layers, and in addition, the melting point is higher than the liquid phase line temperature of the first welding alloy layers and the second welding alloy layers.
Owner:IND TECH RES INST

Electrophoretic display and manufacturing method thereof

The invention relates to an electrophoretic display and a manufacturing method thereof. The electrophoretic display comprises a first base plate, an active component array, a driving circuit, a flexible printed circuit, an electrophoretic display layer, a second base plate and a driving chip. The first base plate is provided with a first surface which is provided with a display region and a line region. The active component array is arranged in the display region, the driving circuit is arranged in the line region and is electrically connected to the active component array, and an electric conduction flexible circuit is partially arranged on the first base plate and is electrically connected to the driving circuit. The electrophoretic display layer and the second base plate are arranged on the active component array and the driving circuit sequentially, and the sealing compound is adhered between the second base plate and the electric conduction flexible circuit to tightly seal the electrophoretic display layer between the first base plate and the second base plate. The driving chip is connected with the diving circuit, and the electrophoretic display layer comprises an opening to expose the driving chip. The invention also discloses a manufacturing method of the electrophoretic display.
Owner:E INK HLDG INC

Touch control display device

A touch control display device comprises a display device and a touch control panel; the touch control panel is arranged on one side of the display device, wherein the touch control panel comprises a substrate, a light shield layer, and a circuit layer, the light shield layer is arranged between the substrate and the display device. The circuit layer is arranged between the light shield layer and the display device; and the circuit layer comprises a first signal electrode and a second signal electrode. The first signal electrode has a first overlapped area and a first non-overlapped area. The second signal electrode has a second overlapped area and a second non-overlapped area, wherein the first overlapped area and the second overlapped area are overlapped with the light shield layer; and the distance between the first overlapped area and the second overlapped area is greater than the distance between the first non-overlapped area and the second non-overlapped area.
Owner:INNOLUX CORP

Semiconductor element manufacturing method

The present invention discloses a semiconductor element manufacturing method. First, a substrate with a first transistor structure and a second transistor structure is provided, wherein the first transistor structure is provided with a first gate trench, and the second transistor structure is provided with a second gate trench. Then, a first work function metal layer is formed in the first gate trench and the second gate trench, and a flat layer is formed on the first work function metal layer. Then, a patterned photoresist layer is formed on the flat layer, and a part of the flat layer on the second transistor structure is etched. Then, after the patterned photoresist layer is removed, the flat layer is fully etched until the flat layer on the second transistor structure is completely removed, and a patterned flat layer is kept to cover the first transistor structure. Finally, the first work function metal layer in the second gate trench is removed.
Owner:UNITED MICROELECTRONICS CORP

Manufacturing method for contact plug layout

The invention discloses a manufacturing method for a contact plug layout. The manufacturing method comprises the following steps of (a) receiving a plurality of active area patterns and a plurality ofburied gate patterns parallel to one another, wherein each active area pattern overlaps the two buried gate patterns separately to form two overlapping areas in the active area pattern and a contactplug area between the two overlapping areas; (b) forming contact plug patterns on the contact plug areas respectively, wherein the contact plug patterns comprise a parallelogram shape, the inner angleof the parallelogram shape is not equal to 90 degrees, the contact plug patterns overlap parts of buried gate patterns in all active areas respectively, and the step (a) and step (b) are conducted inone computer device.
Owner:UNITED MICROELECTRONICS CORP +1

Flat display panels, methods and apparatuses to repair the same

When a defective pixel causing light leakage is detected in a flat display panel, an optical modulation region is formed in a substrate by emitting a laser beam such that a virtual image is displayed at a position corresponding to the defective pixel. Accordingly, quality of the flat display panel may be improved thereby increasing manufacturing process yield.
Owner:SAMSUNG ELECTRONICS CO LTD

Multilayered circuit board structure with buried element and manufacturing method

The invention discloses a multilayered circuit board structure with a buried element and a manufacturing method. The manufacturing method comprises the following steps of providing a substrate with a first surface and first contraposition marks; arranging semiconductor elements on the substrate; forming a dielectric layer, which covers the semiconductor element, is provided with a second surface and has second contraposition marks, on the substrate; enabling the second contraposition marks to correspond to the semiconductor elements; forming a first through hole group which comprises a plurality of through holes extending to the first surface from the second surface and a second through hole group which comprises a plurality of second through holes extending to the semiconductor elements from the second surface by using the first contraposition marks and the second contraposition marks as contraposition references; forming a wire group on the second surface; and patterning the wire group in two stages so as to respectively obtain a first wire group and a second wire group which are connected with each other.
Owner:TRIPOD WUXI ELECTRONICS

Liquid crystal display panel and making method thereof

The application discloses a liquid crystal display panel and a making method thereof. The liquid crystal display panel comprises a display area and a packaging area arranged around the display area; the liquid crystal display panel also comprises an array substrate, a color film substrate arranged opposite to the array substrate, and first encapsulation adhesive and second encapsulation adhesive which are respectively used for fixing the array substrate and the color film substrate, wherein the first encapsulation adhesive is positioned in the packaging area; the liquid crystal display panel comprises a plurality of side faces, and the second encapsulation adhesive is arranged on the at least one side face of the liquid crystal display panel; in the side faces provided with the second encapsulation adhesive, the second encapsulation adhesive covers the side faces of part of the array substrate, the side faces of part of the color film substrate and a gap between part of the array substrate and part of the color film substrate. After the scheme provided by the embodiments of the application is adopted, the probability of liquid crystal leakage is reduced, and the yield of a preparation technology of narrow-bezel liquid crystal display panels is increased.
Owner:XIAMEN TIANMA MICRO ELECTRONICS

Chip package

The invention discloses a chip package, which comprises a pre-molded lead frame, a chip, a plurality of leads, a barricade and a molding compound. A chip carrier and a plurality of pins of the pre-molded lead frame are wrapped by a pre-molding unit in an integrally forming manner, a first portion of each pin extends outside the pre-molding unit, the barricade is disposed on the pre-molded lead frame and connected with the pre-molding unit so as to form a cavity for holding the chip and the leads, the barricade and the pre-molding unit can be made of different materials, and the molding compound is filled into the cavity to cover the chip and the leads.
Owner:ADVANCED SEMICON ENG INC

Display panel and electronic equipment

The invention provides a display panel and electronic equipment. The display panel comprises a plurality of sub-pixels and a plurality of pixel units, wherein the sub-pixels include at least one firstcolor sub-pixel and at least one second color sub-pixel; and the sub-pixels are arranged in one-to-one correspondence with the pixel units. According to the display panel provided by the invention, the difficulty of a preparation process is greatly reduced when a high aperture opening ratio is guaranteed, so that the yield of the preparation process of the display panel is increased, the preparation cost of the display panel is remarkably lowered, the display performance of the display panel can be greatly improved, and the comfortable user experience is provided.
Owner:WUHAN TIANMA MICRO ELECTRONICS CO LTD

Circuit board packaging structure and manufacturing method thereof

The present invention discloses a circuit board packaging structure and a manufacturing method thereof. The circuit board packaging structure comprises a substrate, an annular magnetic element, a first stack-up layer, a plurality of external conduction columns, a plurality of internal conduction columns, a plurality of second stack-up layers and a plurality of conductive slots. The substrate comprises an annular groove, and a first surface and a second surface which are opposite with each other. The annular groove is arranged at the first surface. The annular magnetic element is arranged in the annular groove. The first stack-up layer is arranged on the first surface. The external conduction columns and the internal conduction columns run through the substrate and are respectively located at the external area and the internal area of the annular groove. The external conduction columns are electrically connected with the corresponding internal conduction columns. The second stack-up layers are respectively arranged on the first stack-up layers and the second surface. The conductive slots are arranged at the periphery of the substrate. The conductive slots run through the substrate, the first stack-up layer and the second stack-up layer.
Owner:TRIPOD WUXI ELECTRONICS

Fingerprint sensing module

PendingCN113792571AIncreased force toleranceIncrease manufacturing process marginSolid-state devicesPrint image acquisitionEngineeringMaterials science
The invention provides a fingerprint sensing module. The fingerprint sensing module comprises a first substrate, an active element, a photosensitive element layer, a collimation structure layer, a second substrate, a plurality of micro lenses and a gap pattern, the active element is disposed on the first substrate. The photosensitive element layer is arranged on the first substrate and is electrically connected with the active element. The collimation structure layer is arranged on the photosensitive element layer. The second substrate is arranged on the collimation structure layer. The plurality of micro lenses are arranged on the surface of the side, away from the photosensitive element layer, of the collimation structure layer and are overlapped on the photosensitive element layer. The micro-lens areas are divided into a plurality of micro-lens groups, and the micro-lens groups are respectively located in a plurality of sensing pixel areas of the fingerprint sensing module. The gap pattern extends between the microlens groups. According to the fingerprint sensing module provided by the invention, the external force tolerance and the manufacturing process margin of the fingerprint sensing module can be increased, so that the manufacturing process yield and the reliability of the fingerprint sensing module are improved.
Owner:AU OPTRONICS CORP

Electrophoretic display and manufacturing method thereof

The invention relates to an electrophoretic display and a manufacturing method thereof. The electrophoretic display comprises a first base plate, an active component array, a driving circuit, a flexible printed circuit, an electrophoretic display layer, a second base plate and a driving chip. The first base plate is provided with a first surface which is provided with a display region and a line region. The active component array is arranged in the display region, the driving circuit is arranged in the line region and is electrically connected to the active component array, and an electric conduction flexible circuit is partially arranged on the first base plate and is electrically connected to the driving circuit. The electrophoretic display layer and the second base plate are arranged on the active component array and the driving circuit sequentially, and the sealing compound is adhered between the second base plate and the electric conduction flexible circuit to tightly seal the electrophoretic display layer between the first base plate and the second base plate. The driving chip is connected with the diving circuit, and the electrophoretic display layer comprises an opening to expose the driving chip. The invention also discloses a manufacturing method of the electrophoretic display.
Owner:E INK HLDG INC
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products