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Self-rectifying resistance random access memory with cross array structure and preparation method

A technology of resistive memory and cross array, which is used in semiconductor devices, electric solid state devices, electrical components, etc.

Active Publication Date: 2013-09-11
PEKING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved by the present invention is: how to provide a memory suitable for three-dimensional integration and having self-rectification characteristics without increasing the complexity of the process

Method used

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  • Self-rectifying resistance random access memory with cross array structure and preparation method
  • Self-rectifying resistance random access memory with cross array structure and preparation method
  • Self-rectifying resistance random access memory with cross array structure and preparation method

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preparation example Construction

[0040] Figure 5 is prepared figure 2 Flow chart of the preparation method of the shown memory; Figure 5 , the present invention also discloses a preparation method for preparing the memory, comprising the following steps:

[0041] S1: Ion implantation of elements used to form heavily doped silicon on the silicon substrate;

[0042] S2: forming the nanocolumn at the heavily doped silicon formed in step S1 by photolithography;

[0043] S3: On the basis of step S2, deposit the material of the resistive switching oxide layer by a deposition method;

[0044] S4: On the basis of step S3, use etching technology to remove the excess material of the resistive oxide layer, and only retain the resistive oxide layer around the sidewall of the nano-column;

[0045] S5: forming an isolation layer by a deposition method;

[0046] S6: Form a metal layer by using a deposition method, and return to step S5 until a preset number of times is performed.

Embodiment 1

[0048] attached Figure 6 show figure 2 Schematic diagram of the fabrication method of the shown memory. First, ion-implant B, N, P, As and other elements on a lightly doped silicon substrate to form heavily doped n-type silicon or heavily doped p-type silicon, with a doping concentration of 10 18 ~10 20 cm -3 , the doped region is a part from the upper surface of the silicon substrate to a depth of 0.5-5um. Then use photolithography and etching technology to carve neatly arranged circular or square silicon nano-columns, the diameter or side length of the nano-columns is 5-50 nm, and the length is equal to the depth of the doped region. Then use a good conformal deposition method on the structure, such as atomic layer deposition (ALD) to deposit a resistive material, which can be selected from HfO 2 , NiO, TiO 2 , ZrO 2 , ZnO, WO 3 、 Ta 2 o 5 、Al 2 o 3 , CeO 2 , La 2 o 3 、Gd 2 o 3 It is composed of a material in the group formed by any combination thereof, an...

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Abstract

The invention discloses a self-rectifying resistance random access memory with a cross array structure and a preparation method and relates to the technical field of a semiconductor integrated circuit and manufacturing thereof. The memory comprises a silicon substrate. At least one nano column vertical to the silicon substrate is arranged on the silicon substrate. A resistive oxide layer is arranged around the side wall of the nano column by a circle. An isolation layer and a metal layer are arranged around the outer side wall of the resistive oxide layer by a circle at intervals from bottom to top. The nano column is made of heavily doped silicon. According to a certain structure setting, the aim of providing the memory which is suitable for three-dimensional integration and has self-rectifying characteristic under the condition that the process complexity is not increased is fulfilled.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuits and their manufacture, in particular to a self-rectifying resistive memory with a cross-array structure and a preparation method thereof. Background technique [0002] Non-volatile memory has the advantage of maintaining data information when there is no power supply, and plays a very important role in the field of information storage. Among them, the new non-volatile memory using resistance change has the advantages of high speed (<1ns), low operating voltage (<1.5V), high storage density, multi-value storage on one unit, and easy integration. It is very promising to become Mainstream technology for next-generation semiconductor memory. This resistive variable memory (RRAM) generally has a metal-insulator-metal sandwich structure, that is, a layer of dielectric film material with resistive properties is added between two layers of metal electrodes, and these resis...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/24H01L45/00
Inventor 高滨康晋锋刘力锋刘晓彦
Owner PEKING UNIV