Multistep single-ramp analog digital signal conversion device

Abstract

The invention discloses a multistep single-ramp analog digital signal conversion device which comprises a sample-and-hold remainder amplification module, a ramp and reference voltage generating module, a comparator, a counter, a control signal generator, a digital correction unit and an output module. After being sampled by the sample-and-hold remainder amplification module, an input voltage Vin serving as an input signal VSH1 of the comparator is compared with a ramp voltage Vramp; the Vramp is linearly increased along with the increase of an output value of the counter; when the Vramp is higher than the VSH1, an output of the comparator is jumped to trigger a register in the digital correction unit to latch a current value, i.e. a first-step quantized value of an ADC (Analog To Digital Converter), of the counter; the second,..., NSth-step quantization processes are the same as the first-step quantization process; and after being corrected by a correction circuit in the digital correction unit, an NSth-step quantized value is registered in the output module and is shifted under the control of the control signal generator to be output in series or in parallel. Compared with a conventional single-ramp ADC, the multistep single-ramp analog digital signal conversion device has the advantages of high speed, low requirement on indexes of the comparator and the like.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a multi-step monoclinic analog-to-digital signal conversion device. Background technique [0002] High-speed CMOS image sensors generally use column-parallel readout circuits, and each column readout circuit includes an analog-to-digital signal conversion device (ADC). The area of ​​the entire high-speed CMOS image sensor chip increases linearly with the increase in the area of ​​the ADC. At present, the ADCs used in the column-parallel readout circuits of high-speed CMOS image sensors mainly include: single-slope ADCs, successive approximation ADCs, and the like. The monoclinic ADC has a simple structure and a small area, but its quantization period is long, and it takes 2 N clock cycles, where N is the number of ADC bits. The successive approximation ADC is fast, and it takes N clock cycles to complete a quantization, but each successive approximation ...

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Problems solved by technology

[0004] In order to solve the problems of slow speed of monoclinic ADC and large area of ​​successive approximation ADC, the present invention provides a multi-step monoclinic analog-to-digital signal conversion device. It has the advantages of low requirements, and also has the advantages of small area and low power consumption of traditional single-slope ADC; compared with successive approximation ADC, it has the advantage of small area

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