Field-effect transistor and method of manufacturing the same
A field effect transistor, gate insulating film technology, applied in transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve problems such as reduced process yield, reduced device reliability, and deterioration.
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no. 1 example
[0016] exist figure 1 In the sectional view of the MISFET structure, reference numeral 10 denotes a Ge substrate. On a part of Ge substrate 10, gate insulating film 20 is formed. By sequentially stacking GeO 2 layer 21 (1 nm thick) and LaAlO 3 A high dielectric constant insulating film 22 (2.5 nm thick) is used to form the gate insulating film 20 . On the high dielectric constant insulating film 22, a TaN gate electrode 30 (10 nm thick) and SiO 2 Hard mask 41 (3nm thick). On both side surfaces of gate electrode 30 , metal oxide films 31 are formed.
[0017] On both sides of the gate stacked structure composed of the gate insulating film 20, the gate electrode 30, the hard mask 41, the metal oxide film 31, etc., a silicon nitride (SiN) gate side wall insulating film 42 ( bottom width of 10 nm). In the substrate 10 on both sides of the gate stack structure, source-drain regions 50 are formed. The source-drain region 50 is composed of a thin extended diffusion layer 51 (1...
no. 2 example
[0030] Refer below Figure 3A-3C The manufacturing process of the field effect transistor according to the second embodiment is explained. and figure 1 The same parts are denoted by the same reference numerals, and their detailed explanations are omitted.
[0031] The second embodiment differs from the first embodiment in the process of performing RIE to form the gate stacked structure part. That is, in the RIE process, the etching of the gate electrode 30 and the etching of the gate insulating film 20 are performed in two stages, instead of etching the gate electrode 30 and the gate insulating film 20 at the same time.
[0032] In particular, in Figure 2B After the state shown, as Figure 3A As shown, the gate electrode 30 is selectively etched by RIE using, for example, a chlorine-based gas. At this time, etching stops on the surface of the high dielectric constant insulating film 22 .
[0033] Then, if Figure 3B As shown, a nitridation treatment such as plasma nitr...
no. 3 example
[0038] Refer below Figure 4 as well as Figure 5A with Figure 5B The element structure of the field effect transistor according to the third embodiment is explained. and figure 1 The same parts are denoted by the same reference numerals, and their detailed explanations are omitted.
[0039] The third embodiment uses a metal source-drain structure. Such as Figure 4 As shown, the source-drain region 50 of the third embodiment is composed of only the NiGe layer 53 without using a diffusion layer. The NiGe layer 53 extends just below the gate terminal so that carriers are injected into the inversion layer without passing through the p-n junction. In the n-MIS transistor, S separation region 58 is formed near the interface between NiGe layer 53 and Ge substrate 10 .
[0040] In the case of nMIS transistors, separation of S atoms near the NiGe-Ge interface is very effective for lowering the Schottky barrier to electrons. As an alternative to separated atoms S, Se can also...
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