Strain SiGe plane Si-based BiCMOS (Bipolar Complementary Metal Oxide Semiconductor) integrated device on basis of SOI (Silicon On Insulator) substrate and preparation method
A technology for integrating devices and substrate surfaces, which is applied in the field of strained SiGe planar Si-based BiCMOS integrated devices and preparation, and can solve problems such as difficult to meet design, affect device performance, and unsatisfactory photolithography technology
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Embodiment 1
[0113] Embodiment 1: The strained SiGe planar Si-based BiCMOS integrated device and circuit based on the SOI substrate with a channel length of 22nm are prepared, and the specific steps are as follows:
[0114] Step 1, epitaxial growth.
[0115] (1a) Select the SOI substrate, the support material of the lower layer of the substrate is Si, and the middle layer is SiO 2 , with a thickness of 150nm, and the upper material is doped with a concentration of 1×10 16 cm -3 N-type Si with a thickness of 100nm;
[0116] (1b) Using the method of chemical vapor deposition (CVD), grow a layer of N-type epitaxial Si layer with a thickness of 250nm on the upper layer of Si material at 600°C, as the collector region, and the doping concentration of this layer is 1× 10 16 cm -3 ;
[0117] (1c) Deposit a layer of SiO with a thickness of 200nm on the surface of the substrate at 600°C by chemical vapor deposition (CVD). 2 layer;
[0118] (1d) Deposit a layer of SiN with a thickness of 100...
Embodiment 2
[0176] Embodiment 2: The strained SiGe planar Si-based BiCMOS integrated device and circuit based on the SOI substrate with a channel length of 130nm are prepared, and the specific steps are as follows:
[0177] Step 1, epitaxial growth.
[0178] (1a) Select the SOI substrate, the support material of the lower layer of the substrate is Si, and the middle layer is SiO 2 , with a thickness of 300nm, and the upper material is doped with a concentration of 5×10 16 cm -3 N-type Si with a thickness of 120nm;
[0179] (1b) Using the chemical vapor deposition (CVD) method, at 700 ° C, grow a layer of N-type epitaxial Si layer with a thickness of 250 nm on the upper Si material, as the collector region, and the doping concentration of this layer is 5× 10 16 cm -3 ;
[0180] (1c) Deposit a layer of SiO with a thickness of 240nm on the surface of the substrate at 700°C by chemical vapor deposition (CVD). 2 layer;
[0181] (1d) Deposit a layer of SiN with a thickness of 150 nm on ...
Embodiment 3
[0239] Embodiment 3: The strained SiGe planar Si-based BiCMOS integrated device and circuit based on the SOI substrate with a channel length of 350nm are prepared, and the specific steps are as follows:
[0240] Step 1, epitaxial growth.
[0241] (1a) Select the SOI substrate, the support material of the lower layer of the substrate is Si, and the middle layer is SiO 2 , with a thickness of 400nm, and the upper material is doped with a concentration of 1×10 17 cm -3 N-type Si with a thickness of 150nm;
[0242] (1b) Using chemical vapor deposition (CVD), grow a layer of N-type epitaxial Si layer with a thickness of 300nm on the upper layer of Si material at 750°C, as the collector region, and the doping concentration of this layer is 1× 10 17 cm -3 ;
[0243] (1c) Deposit a layer of SiO with a thickness of 300nm on the surface of the substrate at 800°C by chemical vapor deposition (CVD). 2 layer;
[0244] (1d) Deposit a SiN layer with a thickness of 200nm on the surfac...
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