A strained SiGe planar Si-based Bicmos integrated device based on SOI substrate and its preparation method
A technology for integrating devices and substrate surfaces, which is applied in the field of strained SiGe planar Si-based BiCMOS integrated devices and fabrication, and can solve problems such as difficulty in design, reduction in lithography accuracy, and inability to meet low power consumption.
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Embodiment 1
[0113] Embodiment 1: Prepare a strained SiGe planar Si-based BiCMOS integrated device and circuit based on an SOI substrate with a channel length of 22 nm. The specific steps are as follows:
[0114] Step 1, epitaxial growth.
[0115] (1a) Select an SOI substrate, the lower support material of the substrate is Si, and the middle layer is SiO 2 , The thickness is 150nm, the upper layer material is doping concentration is 1×10 16 cm -3 N-type Si with a thickness of 100nm;
[0116] (1b) Using the chemical vapor deposition (CVD) method, at 600℃, grow a layer of 250nm thick N-type epitaxial Si layer on the upper Si material as a collector area, the doping concentration of this layer is 1× 10 16 cm -3 ;
[0117] (1c) Using chemical vapor deposition (CVD) method, at 600℃, deposit a layer of SiO with a thickness of 200nm on the surface of the substrate 2 Floor;
[0118] (1d) Using chemical vapor deposition (CVD) method, at 600℃, deposit a layer of SiN with a thickness of 100nm on the surface o...
Embodiment 2
[0176] Embodiment 2: Prepare a strained SiGe planar Si-based BiCMOS integrated device and circuit based on an SOI substrate with a channel length of 130 nm. The specific steps are as follows:
[0177] Step 1, epitaxial growth.
[0178] (1a) Select an SOI substrate, the lower support material of the substrate is Si, and the middle layer is SiO 2 , The thickness is 300nm, the upper material is doping concentration is 5×10 16 cm -3 N-type Si with a thickness of 120nm;
[0179] (1b) Using chemical vapor deposition (CVD) method, at 700℃, grow a layer of 250nm thick N-type epitaxial Si layer on the upper Si material as a collector area, the doping concentration of this layer is 5× 10 16 cm -3 ;
[0180] (1c) Using chemical vapor deposition (CVD), a layer of SiO with a thickness of 240nm is deposited on the surface of the substrate at 700°C 2 Floor;
[0181] (1d) Using chemical vapor deposition (CVD) method, at 700℃, deposit a layer of SiN with a thickness of 150nm on the surface of the subst...
Embodiment 3
[0239] Embodiment 3: Prepare a strained SiGe planar Si-based BiCMOS integrated device and circuit based on an SOI substrate with a channel length of 350 nm. The specific steps are as follows:
[0240] Step 1, epitaxial growth.
[0241] (1a) Select an SOI substrate, the lower support material of the substrate is Si, and the middle layer is SiO 2 , The thickness is 400nm, the upper layer material is doping concentration is 1×10 17 cm -3 N-type Si with a thickness of 150nm;
[0242] (1b) Using the method of chemical vapor deposition (CVD), at 750℃, grow an N-type epitaxial Si layer with a thickness of 300nm on the upper Si material as a collector area. The doping concentration of this layer is 1× 10 17 cm -3 ;
[0243] (1c) Using chemical vapor deposition (CVD) method, at 800℃, deposit a layer of SiO with a thickness of 300nm on the surface of the substrate 2 Floor;
[0244] (1d) Using chemical vapor deposition (CVD) method, at 800℃, deposit a layer of SiN with a thickness of 200nm on the...
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