Processor fault injection method oriented to BIT software test and simulator thereof

A technology of fault injection and software testing, applied in the field of processors, can solve problems such as failure to execute, failure to inject components, poor accessibility, etc., to achieve the effect of ensuring reliability and accuracy

Inactive Publication Date: 2012-10-31
BEIHANG UNIV
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Problems solved by technology

[0005] However, traditional fault injection technology faces many problems: Although hardware-based fault injection technology injects real hardware faults, it is limited by the high density of components on the circuit board, and there is not enough space for additional hardware fault injection equipment such as probes and sockets. , and the internal faults of the more concerned components cannot be injected; software-based fault injection technology has various benefits in other applications, but the code of BIT software is not open (or not allowed to be modified), the operating structure is complex, and the accessibility is poor , so software fault injection has nowhere to start in BIT software testing; finally, although the fault injection technology based on simulation/simulation implemented by hardware description languages ​​such as VHDL and Verilog can accurately simulate the hardware environment in which BIT software runs, it cannot support BIT softw

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  • Processor fault injection method oriented to BIT software test and simulator thereof
  • Processor fault injection method oriented to BIT software test and simulator thereof
  • Processor fault injection method oriented to BIT software test and simulator thereof

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[0042] The present invention will be further described in detail below with reference to the drawings and embodiments.

[0043] As an embedded software in avionics equipment, BIT software cannot run directly on x86 architecture PCs. The hardware circuit boards it runs are generally PowerPC, ARM and other RISC architectures. However, due to the closedness and non-intrusiveness of aviation boards For other reasons, failures cannot be injected directly into the hardware. Since the simulator is implemented in software according to the real hardware functions, it can be modified arbitrarily, and there is no intrusion or damage to the hardware and the applications running on it. Therefore, it is a feasible solution to combine simulator and fault injection technology in BIT software testing. The basic technical idea of ​​the present invention is: take the hardware circuit board running BIT software as the simulation object, adopt the method of simulator simulation to solve the bottlene...

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Abstract

The invention provides a processor fault injection method oriented to a BIT (Built-In Test) software test and a simulator thereof, wherein a hardware circuit board that runs BIT software is taken as a simulation object of the simulator. A normal function simulation module, a fault model parsing module, a fault injection module, a failure behavior simulation module and a peripheral crosslinking environment emulation module are additionally arranged in the processor fault injection method, wherein the normal function simulation module simulates the normal functions of a processor, memorizer and the like; the fault model parsing module parses a fault sequence file; and the fault injection module matches and injects a fault. The processor fault injection method compiles and parses an XML (Extensive Markup Language) fault sequence file to form the fault sequence that can be identified by the simulator by building a fault mode library, searches and injects the corresponding fault when the simulator encounters a fault observation point during the simulation process, and performs the fault simulation when the fault is triggered. The processor fault injection method and the simulator can achieve more complete types of the injected fault modes, can fully cover test cases under each failure occurrence, and can test the circuit board-level BIT software more sufficiently; in addition, only the BIT software that is tested fully can ensure the accuracy and the timeliness of BIT prediction of aeronautical airborne equipment, and further ensures the reliability and the safety of a system.

Description

technical field [0001] The invention relates to a fault injection technology in reliability engineering and a processor technology in computer engineering, in particular to a processor fault injection method for BIT software testing and a simulator thereof. Background technique [0002] No matter how high the reliability of a system, equipment or product is, it cannot guarantee that it will always work normally. Users and maintainers must monitor its health status and know whether there is a fault or where a fault has occurred, so it must be monitored and tested. . Therefore, it is hoped that the system and equipment itself can provide convenience for this purpose. The characteristics of this kind of system and equipment that are convenient for monitoring their health status and easy for fault diagnosis and testing are the testability of the system and equipment. Testability refers to a design characteristic of a product that can promptly and accurately determine its state ...

Claims

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Application Information

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IPC IPC(8): G06F11/36
Inventor 徐萍李毅高小鹏王自力徐军张茂帝
Owner BEIHANG UNIV
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