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WLCSP (Wafer Level Chip Size Packaging) single-chip package on basis of paste masks and packaging method thereof

A packaging method and single-chip technology, applied in electrical components, electrical solid-state devices, semiconductor devices, etc., can solve the problems of complex WLCSP production process, high cost, and extremely high requirements for electroplating and lithography accuracy.

Inactive Publication Date: 2012-12-26
HUATIAN TECH XIAN
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] The traditional WLCSP production process is complicated, and the precision of electroplating and photolithography is extremely high, and the cost is high

Method used

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  • WLCSP (Wafer Level Chip Size Packaging) single-chip package on basis of paste masks and packaging method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0037] A WLCSP single-chip package based on a solder paste layer, plated with Au or Cu metal bumps 4 and a solder paste layer 2, its packaging method: follow the steps below:

[0038] The first step, wafer thinning;

[0039] The thinned thickness of the wafer is 50μm, and the roughness Ra is 0.10mmmm;

[0040] The second step is to plate metal bumps;

[0041] Plating metal bumps 4 on the surface of metal Au in the chip nip area on the entire wafer;

[0042] The third step, scribing;

[0043] For wafers with a thickness below 150 μm, use a double-knife dicing machine and its process;

[0044] The fourth step is to tin-plate the corresponding area of ​​the frame;

[0045] A layer of 2um solder paste layer 2 is plated on the corresponding area of ​​PAD on pin 1 in the frame;

[0046] The fifth step, core;

[0047] Turn the IC chip 5 upside down, and weld the metal bumps 4 on the IC chip 5 to the frame by using the Flip-Chip process;

[0048] The sixth step, reflow solderin...

Embodiment 2

[0053] A WLCSP single-chip package based on a solder paste layer, coated with Cu metal bumps 4 and a solder paste layer 2, its packaging method: follow the steps below:

[0054] The first step, wafer thinning;

[0055] The thickness of wafer thinning is 130μm, and the roughness Ra is 0.20mm;

[0056] The second step is to plate metal bumps;

[0057] Plating metal bumps 4 on the metal Cu surface of the chip nip area on the entire wafer;

[0058] The third step, scribing;

[0059] For wafers with a thickness below 150 μm, use a double-knife dicing machine and its process;

[0060] The fourth step is to tin-plate the corresponding area of ​​the frame;

[0061] A layer of 25um solder paste layer 2 is plated on the corresponding area of ​​PAD on pin 1 in the frame;

[0062] The fifth step, core;

[0063] Turn the IC chip 5 upside down, and weld the metal bumps 4 on the IC chip 5 to the frame by using the Flip-Chip process;

[0064] The sixth step, reflow soldering;

[0065] U...

Embodiment 3

[0069] A WLCSP single-chip package based on a solder paste layer, plated with Au or Cu metal bumps 4 and a solder paste layer 2, its packaging method: follow the steps below:

[0070] The first step, wafer thinning;

[0071] The thickness of wafer thinning is 200μm, and the roughness Ra is 0.30mm;

[0072] The second step is to plate metal bumps;

[0073] Plating metal bumps 4 on the surface of metal Al or Cu in the chip nip area on the entire wafer;

[0074] The third step, scribing;

[0075] Wafers above 150μm adopt ordinary dicing process;

[0076] The fourth step is to tin-plate the corresponding area of ​​the frame;

[0077] A layer of 50um solder paste layer 2 is plated on the corresponding area of ​​PAD on pin 1 in the frame;

[0078] The fifth step, core;

[0079] Turn the IC chip 5 upside down, and weld the metal bumps 4 on the IC chip 5 to the frame by using the Flip-Chip process;

[0080] The sixth step, reflow soldering;

[0081] Using the reflow soldering ...

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Abstract

The invention relates to a WLCSP (Wafer Level Chip Size Packaging) single-chip package on the basis of paste masks and a packaging method thereof and belongs to the technical field of packaging of an integrated circuit. The paste masks are plated in regions on a pin in a frame, which are welded with metal bumps; the metal bumps are plated on the surface of a pressing region of an IC (Integrated Circuit) chip; the metal bumps and the paste masks on the pin in the frame are welded together by welding flux in a mode of inversely mounting the chip; the paste masks, the welding flux, the metal bumps and the IC chip are sequentially arranged on the pin in the frame; the pin in the frame, the paste masks, the welding flux, the metal bumps and the IC chip are surrounded by the package to form the integral circuit; and a power supply and signal channel of the circuit is formed by the IC chip, the metal bumps, the welding flux, the paste masks and the pin in the frame. According to the invention, the plated metal bumps different from conventional metal bumps are adopted; meanwhile, the chip and the pin in the frame are welded by the welding flux; the conduction and the interconnection between the chip and the pin are directly completed without routing; and the WLCSP single-chip package has the characteristics of low cost and high efficiency.

Description

technical field [0001] The invention relates to a WLCSP single-chip package based on a solder paste layer and a plastic sealing method thereof. The WLCSP single-chip package is plated with Au or Cu metal bumps and a solder paste layer, and belongs to the technical field of integrated circuit packaging. Background technique [0002] With the rapid development of microelectronics technology and the increase in the complexity of integrated circuits, most of the functions of an electronic system may be integrated in a single chip (system on chip), which requires microelectronic packages to have higher performance and more More leads, denser interconnection, smaller size or larger chip cavity, greater heat dissipation function, better electrical performance, higher reliability, lower cost per lead, etc. The chip packaging process has changed from chip-by-chip packaging to wafer-level packaging. Wafer-level chip packaging technology——WLCSP just meets these requirements and forms a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/488H01L21/48H01L21/60
CPCH01L2224/16245
Inventor 郭小伟马勉之崔梦谢建友魏海东
Owner HUATIAN TECH XIAN
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