Address mapping method and device of FFT (Fast Fourier Transform) of parallel branch butterfly unit

A butterfly unit and address mapping technology, applied in the field of communication, can solve the problem of inability to guarantee the continuity and effectiveness of FFT operations, and achieve the effect of reducing implementation cost and complexity, and ensuring continuity and effectiveness.

Inactive Publication Date: 2013-01-02
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0005] In view of this, the present invention provides a FFT address mapping method and device of a parallel branch butterfly unit, to overcome the fact that the continuity and effectiveness of the FFT operation cannot be guaranteed in the prior art during the FFT address mapping process of the butterfly unit The problem

Method used

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  • Address mapping method and device of FFT (Fast Fourier Transform) of parallel branch butterfly unit
  • Address mapping method and device of FFT (Fast Fourier Transform) of parallel branch butterfly unit
  • Address mapping method and device of FFT (Fast Fourier Transform) of parallel branch butterfly unit

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Embodiment 1

[0047] Please refer to the attached figure 1, is a flow chart of the address mapping method of the FFT of a parallel branch butterfly unit disclosed by the present invention, mainly comprising the following steps:

[0048] Step S101 , according to the number N of sampling points of the FFT, determine the radix D of the FFT, and the total number of stages M of the FFT inter-stage transformation corresponding to the radix D.

[0049] In the execution step S101, the FFT of the radix D is the radix of the FFT butterfly unit, and the value of D is related to the number N of sampling points. The total number of stages M of the FFT interstage transformation corresponding to the base D is related to the base D and the number N of sampling points. The bases in the present invention mainly include: base 8, base 4 and base 2. Generally, the larger the base, the higher the efficiency. Wherein, the number of sampling points can be extracted according to DIF, or can be extracted according...

Embodiment 2

[0080] Please refer to the attached figure 2 , is a schematic flowchart of a parallel branch butterfly unit FFT 64 point DIF4 address conversion shown in the present invention, and the specific conversion process is as follows:

[0081] Such as figure 2 As shown, a total of 64 points are sampled (extracted) according to the frequency extraction method according to DIF, and the operation is performed according to the base 4 of FFT, that is, the value of D is 4, and the value of N is 64. Thus, it can be drawn according to formula (1) that the total number of stages M of the FFT is 3, and the intermediate stages of the FFT transformation of the 64-point DIF4 are 2 stages successively, as figure 2 A and B shown in , wherein, A represents the first-level transformation memory bank group, and B represents the second-level transformation memory bank group.

[0082] Such as figure 2 As shown, the two memory bank groups in the two-level transformation are:

[0083] Group 1 incl...

Embodiment 3

[0096] On the basis of the disclosure of the above-mentioned embodiments of the present invention, as image 3 As shown, the present invention also discloses a schematic flow chart of parallel branch butterfly unit FFT 64-point DIF8 address conversion, and the specific conversion process is as follows:

[0097] Such as image 3 As shown, a total of 64 points are sampled (extracted) according to the method of frequency extraction according to DIF, and the operation is performed according to the base 8 of FFT, that is, the value of D is 8, and the value of N is 64. Thus, it can be drawn according to formula (1) that the total number of stages M of the FFT is 2, and the intermediate stages of the FFT transformation of the 64-point DIF4 are 1 stage successively, as image 3 The A shown in represents the first-level transformation.

[0098] Such as image 3 As shown, the two memory bank groups in the two-level transformation are:

[0099] Group 1 includes, RAMA1, RAMA2, RAMA3, ...

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Abstract

The invention discloses address mapping method and device of FFT (Fast Fourier Transform) of a parallel branch butterfly unit. The method comprises the following steps of: determining a base number and a total stage number of FFT interstage transformation according to an FFT sampling point number; storing sampling points in a memory bank of a first memory bank group according to a sequence; executing the FFT interstage transformation, and parallelly writing data to be processed or intermediate data stored in the memory bank at a current stage, into a different logic block at a next stage according to a circulation displacement mode that a logic block moves by a bit in a line, and the memory bank moves by a bit in a row when a current stage number m is no less than 1 and smaller than M; and stopping the interstage transform until the current stage number m is equal to M. With the adoption of the method based on the FFT interstage transformation and circulation displacement according to the line and the row, the parallel branch butterfly unit FFT address mapping is realized, i.e. prallel read-write among multiple groups of data is realized through the mapping among addresses, and the multiple groups of data are not influenced with one another, thus ensuring the continuity and the effectiveness in the FFT operation process.

Description

technical field [0001] The present invention relates to the field of communication technology, and more specifically, relates to an FFT address mapping method and device of a parallel branch butterfly unit. Background technique [0002] At present, in broadband wireless systems, the physical layer of broadband wireless systems mostly adopts OFDM (Orthogonal Frequency Division Multiplexing, orthogonal frequency division multiplexing) technology, such as WiMAX (Worldwide Interoperability for Microwave Access, global microwave interconnection access), WiFi (wireless fidelity, wireless local area network), DVB (Digital Video Broadcasting, digital video broadcasting), DAB (Digital Audio Broadcasting, digital signal broadcasting), etc., the common feature of the baseband modulation part of the above-mentioned systems is that they all use FFT (Fast Fourier Transformation, Fast Fourier Transformation) as the "modulation engine". Due to the continuous upgrading of broadband systems,...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/14G06F12/06
Inventor 亓中瑞陈杰曲文泽瞿海慧
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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