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Semiconductor package and manufacturing method thereof

A manufacturing method, semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc.

Active Publication Date: 2015-04-29
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In view of this, the present invention provides a semiconductor packaging structure and its manufacturing method to solve the problems of thinning and processing costs that exist when the existing packaging technology uses silicon spacers

Method used

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  • Semiconductor package and manufacturing method thereof
  • Semiconductor package and manufacturing method thereof
  • Semiconductor package and manufacturing method thereof

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Embodiment Construction

[0016] The following descriptions of the various embodiments refer to the accompanying drawings to illustrate specific embodiments in which the present invention can be practiced. Furthermore, the directional terms mentioned in the present invention are, for example, up, down, top, bottom, front, back, left, right, inside, outside, side, surrounding, central, horizontal, transverse, vertical, longitudinal, axial, The radial direction, the uppermost layer or the lowermost layer, etc. are only directions referring to the attached drawings. Therefore, the directional terms used are used to illustrate and understand the present invention, but not to limit the present invention.

[0017] Please refer to figure 1 As shown, the semiconductor package structure of an embodiment of the present invention mainly includes: a thin redistribution interconnection layer (thin re-distribution interconnection layer) 11, at least one chip (chip) 12, a packaging compound (molding compound) 13 and...

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Abstract

The invention discloses a semiconductor package and a manufacturing method thereof. The manufacturing method comprises the following steps of: providing a thin re-distribution interconnection layer which is arranged on a semiconductor base material layer; fixing the thin re-distribution interconnection layer on a temporary carrying plate through an adhesion layer; removing the semiconductor base material layer; drilling the upper surface of the thin re-distribution interconnection layer; electrically connecting a chip to the thin re-distribution interconnection layer; coating the chip by using a molding compound; removing the adhesion layer and the temporary carrying plate; and electrically connecting the thin re-distribution interconnection layer to a circuit substrate. The thin re-distribution interconnection layer is not provided with a silicon base material, a through silicon via hole process is not required, the conventional silicon space layer can be replaced, the thinning trend of the package is facilitated, and packaging cost can be relatively reduced.

Description

technical field [0001] The present invention relates to a semiconductor packaging structure and a manufacturing method thereof, in particular to a semiconductor packaging structure with a thin rewiring transition layer and a manufacturing method thereof. Background technique [0002] Nowadays, in order to meet various high-density packaging requirements, the semiconductor packaging industry has gradually developed various types of packaging structures, among which various system in package (SIP) design concepts are often used to build high-density packaging structures. The above-mentioned system package can be further divided into multi chip module (MCM), package on package (POP) and package in package (PIP). In addition, there are also design concepts for reducing the volume of package structures, such as wafer level package (wafer level package, WLP), chip scale package (chip scale package, CSP) and no external lead package structure (quad-flat package). no-lead package, ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/60H01L21/56
CPCH01L2224/16225H01L2224/32225H01L2224/73204
Inventor 王盟仁
Owner ADVANCED SEMICON ENG INC