Structure of MOS (metal oxide semiconductor) transistor and formation method thereof

Abstract

The embodiment of the invention provides an MOS (metal oxide semiconductor) transistor. The MOS transistor comprises a semiconductor substrate, a gate insulation layer positioned on the surface of the semiconductor substrate, a gate electrode layer positioned on the surface of the gate insulation layer, side walls positioned on the two sides of the gate insulation layer and the gate electrode layer as well as the surface of the semiconductor substrate, a source / a drain positioned on the two sides of the gate insulation layer and the gate electrode layer and in the semiconductor substrate, and a doped layer positioned at the bottom of the gate insulation layer and in the semiconductor substrate. Correspondingly, the embodiment of the invention further provides a formation method of the MOS transistor. The MOS transistor provided by the embodiment of the invention has the advantages of high migration rate of a current carrier and good stability of a gate.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a structure of a MOS transistor and a method for forming the same. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing toward higher component density and higher integration in order to achieve higher computing speed, larger data storage capacity, and more functions. [0003] Please refer to figure 1 , MOS transistors in the prior art, including: [0004] a semiconductor substrate 100; a shallow trench isolation structure 103 located in the semiconductor substrate 100; [0005] The gate insulating layer 107 located on the surface of the semiconductor substrate 100; and the gate electrode layer 109 located on the surface of the gate insulating layer 107; side walls 111 on the surface of the bottom 100; [0006] a source 106 and a drain 105 located on both sides of the gate ...

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Problems solved by technology

[0007] With the development of MOS transistors toward higher integration, the gate length of MOS transistors is gradually reduced, that is, figure 1 The dimensions of the middle gate insulating layer 107 and the gate electrode layer 109 along the surface direction of the semiconductor substrate 100 gradually become smaller, and the mobility of carriers in the channel region of the MOS transistor in the prior art is relatively low.

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