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Manufacturing method of semiconductor device

A manufacturing method and semiconductor technology, which can be used in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as trench deformation, and achieve the effect of reducing linear deformation and ensuring reliability.

Active Publication Date: 2015-04-01
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0012] In order to solve the existing problem of groove deformation generated when etching with a hard mask layer, the present invention provides a method for etching with an improved hard mask layer:

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  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device

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Embodiment Construction

[0031] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of these details. In other examples, some technical features known in the art are not described in order to avoid confusion with the present invention.

[0032] In order to thoroughly understand the present invention, detailed steps will be presented in the following description to explain how the present invention improves the hard mask etching process to solve the problem of channel deformation generated in the existing hard mask etching process. Obviously, the practice of the invention is not limited to specific details familiar to those skilled in the semiconductor arts. Preferred embodiments of the present invention are described in detail below, however, the present invention may have other embodiments bes...

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Abstract

The invention relates to a manufacturing method of a semiconductor device, which comprises the following steps: providing a substrate, and forming a to-be-etched layer on the substrate; and forming a hard mask layer on the to-be-etched layer, wherein the hard mask layer comprises a titanium nitride layer and a boron nitride layer formed on the titanium nitride layer, the thickness of the hard mask layer is 200-500 angstrom, and the thickness of the boron nitride layer is greater than that of the titanium nitride layer. The hard mask layer used by the improved hard mask layer etching method is a double-layer compound structure, i.e. the hard mask layer comprises the titanium nitride layer and the boron nitride layer formed on the titanium nitride layer; and the compressive stress in the boron nitride layer is utilized to weaken the influence of the tension stress in the titanium nitride layer on the device structure, thereby reducing the linear deformation of the device structure. In addition, the etching selectivity of the boron nitride layer is higher, thereby further ensuring the reliability of the semiconductor device.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to an etching method using a hard mask layer. Background technique [0002] The process of manufacturing semiconductor integrated circuit chips uses batch processing technology to form a large number of various types of complex devices on the same silicon substrate, and interconnect them to have complete electronic functions. With the rapid development of ultra-large-scale integrated circuits, the integration of chips is getting higher and higher, and the size of components is getting smaller and smaller. The various effects caused by the high density and small size of devices have an increasing impact on the results of semiconductor process manufacturing. protrude. [0003] Taking hard mask technology as an example, when the semiconductor process enters 90nm, because the size of lithography is getting smaller and smaller, it is often necessary to form a hard mask layer on t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/311H01L21/768
Inventor 胡敏达王冬江张海洋
Owner SEMICON MFG INT (SHANGHAI) CORP