MOS transistor and its manufacturing method

Abstract

Disclosed are a metal oxide semiconductor (MOS) transistor and a manufacturing method thereof. The manufacturing method includes the steps of supplying a semiconductor substrate; forming a dummy gate electrode on the semiconductor substrate; forming a source / drain region inside the semiconductor substrate; forming a first dielectric layer on the semiconductor substrate, wherein the upper surface of the first dielectric layer is level with the upper surface of the dummy gate electrode; removing the dummy gate electrode to form a first through hole, forming a second through hole in the first dielectric layer corresponding to the source region, and forming a third through hole in the first dielectric layer corresponding to the drain region; and padding work function metal layers and metal layers respectively into the side walls of the first through hole, the second through hole and the third through hole in sequence so as to form a metal grid, a first contact plug and a second contact plug, wherein the upper surfaces of the metal grid, the first contact plug and the second contact plug are respectively level with the upper surface of the first dielectric layer. By means of the MOS transistor and the manufacturing method thereof, pits do not occur on the upper surface of the metal grid, and thus smoothness is achieved.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to a MOS transistor and a manufacturing method thereof. Background technique [0002] Heretofore, polysilicon gates, polysilicate gates, and the like have been used as gates in semiconductor devices. Polysilicon gates have the following problems: increase in the effective thickness of the gate insulating film due to the gate loss phenomenon, threshold voltage due to the phenomenon of dopant permeation from the P+ or N+ polysilicon gate to the substrate and changes in dopant distribution changes etc. There is also a problem that a conventional polysilicon gate cannot achieve a low resistance value on a line with a narrow width. [0003] In order to solve the above problems, the prior art provides a solution of replacing the polysilicon gate with a metal gate. At present, the method of preparing metal gates is commonly used as a manufacturing method introduced in US ...

AI Technical Summary

Problems solved by technology

Polysilicon gates have the following problems: increase in the effective thickness of the gate insulating film due to the gate loss phenomenon, threshold voltage due to the phenomenon of dopant permeation from the P+ or N+ polysilicon gate to the substrate and changes in dopant distribution changes, etc.

[0010] However, in the above technology, in the process of forming the first metal gate 71 or the second metal gate 72, the upper surface of the first metal gate 71 and the upper surface of the first dielectric layer 10 need to be connected by CMP. flush or make the upper surface of the second metal grid 72 flush with the upper surface of the first dielectric layer 10, and the area of ​​the upper surface of the first metal grid 71 or the second metal grid 72 is relatively larger than that of the first dielectric layer. The area of ​​the upper surface of the layer 10 is relatively small, so that the upper surface of the first metal grid 71 or the upper surface of the second metal grid 72 has a recess, which cannot be completely flush with the upper surface of the first dielectric layer 10, and eventually Affects gate resistor value

[0011] Similarly, in the process of fabricating the metal gate of NMOS transistors or PMOS transistors using the gate-last process, there is also the defect that the upper surface of the metal gate is recessed

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