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Technique method of manufacturing bottom thick gate oxide layer groove Metal Oxide Semiconductor (MOS) through selective epitaxy

A technology of gate oxide layer and process method, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problem of inaccurate relative position control between epitaxy and trench, difficulty in device performance, and difficulty in forming a thick gate oxide layer at the bottom and other issues, to achieve device breakdown voltage and on-state resistance optimization, easy to form the effect

Active Publication Date: 2015-04-08
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Existing processes form trenches by etching, but this method makes formation of bottom thick gate oxide difficult
Moreover, the existing process generally only has one layer of epitaxy on heavy doping. When two layers of epitaxy are required, the relative position control of the epitaxy and the trench in the prior art process is not accurate enough, so that the optimization of epitaxy doping and device Performance work is more difficult

Method used

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  • Technique method of manufacturing bottom thick gate oxide layer groove Metal Oxide Semiconductor (MOS) through selective epitaxy
  • Technique method of manufacturing bottom thick gate oxide layer groove Metal Oxide Semiconductor (MOS) through selective epitaxy
  • Technique method of manufacturing bottom thick gate oxide layer groove Metal Oxide Semiconductor (MOS) through selective epitaxy

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Embodiment Construction

[0019] The present invention uses selective epitaxy to make the process method of bottom thick gate oxide layer trench MOS, comprises the following steps:

[0020] first step, such as figure 1 As shown, the epitaxial layer is grown on the heavily doped silicon substrate to form the first lightly doped epitaxial layer; the concentration of the heavily doped body is 10 18 / cm 3 above;

[0021] The second step, such as figure 1 As shown, silicon dioxide is grown on the first lightly doped epitaxial layer, and its thickness is equal to or greater than that of the thick gate oxide layer at the bottom of the trench to be formed subsequently;

[0022] The third step, such as figure 2 As shown, the photolithography process is used to apply glue and photolithography on the silicon dioxide to form a photoresist pattern;

[0023] The fourth step, such as image 3 As shown, etching, the silicon dioxide that is not blocked by the photoresist is etched away, exposing the first ligh...

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Abstract

The invention discloses a technique method of manufacturing a bottom thick gate oxide layer groove metal oxide semiconductor (MOS) through selective epitaxy. The method comprises the following steps: (1) forming a first light doping epitaxial layer; (2) growing silica on the first light doping epitaxial layer; (3) forming photoresist patterning; (4) etching the silica which is not blocked by photoresist out clearly to expose the first light doping epitaxial layer outside the photoresist; (5) selectively growing a second epitaxial layer and laterally growing the second epitaxial layer; (6) etching the epitaxial layer above the silica out clearly to expose the silica and forming a groove with a bottom thick gate oxide layer; and (7) forming a grid in the groove. The method ensures that the forming of the bottom thick gate oxide layer becomes easy, and when the groove MOS is provided with double or three epitaxial layers, the positions of the groove relative to the epitaxial layers van can be accurately controlled, and therefore by respectively optimizing and controlling doping density of each epitaxial layer, breakdown voltage and on-state resistance of devices are optimized.

Description

technical field [0001] The invention relates to a manufacturing method of a semiconductor device, in particular to a process method for making trench MOS with thick gate oxide layer at the bottom by selective epitaxy. Background technique [0002] The bottom thick gate oxide layer (500-10000 angstroms thick) MOS (metal oxide semiconductor) can greatly reduce the capacitance between the gate and drain of the device. Existing processes form trenches by etching, but this method makes formation of a thick bottom gate oxide difficult. Moreover, the existing process generally only has one layer of epitaxy on heavy doping. When two layers of epitaxy are required, the relative position control of the epitaxy and the trench in the prior art process is not accurate enough, so that the optimization of epitaxy doping and device Performance work is more difficult. Contents of the invention [0003] The technical problem to be solved by the present invention is to provide a process me...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/20H01L21/28
Inventor 金勤海杨川许凯强
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP