Integrated circuit fault detection method based on feature extraction

Abstract

The invention discloses an integrated circuit fault detection method based on feature extraction. The detection method comprises the following steps: obtaining a theoretical output order of a detected integrated circuit under nominal parameters of all components through theoretical calculation or simulation, obtaining an ideal noise characteristic output by the detected circuit through Monte Carlo simulation, obtaining an actual noise characteristic of a fault-free detected circuit through actual measurement, then calculating to obtain a fault-free characteristic value of the detected circuit; carrying out actual measurement on a detected circuit with an unknown fault, obtaining noise variance of the detected circuit with the unknown fault, then calculating to obtain a characteristic value of the detected circuit with the unknown fault; and finally comparing the characteristic value of the detected circuit with the unknown fault with the fault-free characteristic value of the detected circuit so as to achieve diagnosis for the fault of the integrated circuit. Compared with the prior art, the integrated circuit fault detection method based on the feature extraction is insensitive in noise, strong in robustness of circuit characteristic, low in probability of occurrence of fault aliasing and low in misjudgment rate.

Description

technical field

[0001] The invention belongs to the field of integrated circuit testing, in particular to an integrated circuit fault detection method based on feature extraction. Background technique

[0002] With the rapid development of VLSI, digital-analog mixed-signal circuit and system-on-chip technology, the testability of integrated circuits has become increasingly important. For integrated circuits, especially analog and digital-analog mixed-signal integrated circuits, since the full system test of integrated circuit product specifications is very expensive, sometimes even impossible, and due to the limitation of integrated circuit packaging, it is difficult to analyze the output response of the tested integrated circuit. To become a key issue in testing for fault diagnosis, the characteristic analysis technique of test response is usually adopted. When performing feature analysis, it is judged whether there is a fault in the tested integrated circuit by comparing ...

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