Semiconductor device and method for manufacturing semiconductor device

A semiconductor and device technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of increasing electrode distance, increasing chip size, high cost, etc., and achieving the effect of high insulation withstand voltage

Inactive Publication Date: 2013-07-10
FUJITSU LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In this case, the chip size of the formed device becomes larger, and the number of chips that can be man

Method used

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  • Semiconductor device and method for manufacturing semiconductor device
  • Semiconductor device and method for manufacturing semiconductor device
  • Semiconductor device and method for manufacturing semiconductor device

Examples

Experimental program
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Example

[0044] The first embodiment

[0045] Semiconductor device

[0046] Next, the semiconductor device of this embodiment will be described. Such as figure 2 As shown, the semiconductor device of this embodiment is a field effect transistor with a vertical structure. Specifically, after n + -SiC or n + An n-GaN layer 12, a p-GaN layer 13, and an n-GaN layer 14 are formed on a substrate 11 made of GaN or the like, and an active electrode 21 is formed on a part of the surface of the n-GaN layer 14. Also, from the surface of the n-GaN layer 14, a part of the p-GaN layer 13 and the n-GaN layer 12 is etched to form an opening, and a gate insulating film 15 is formed, which is covered with The surface of the n-GaN layer 14 and the inner surface of the opening. A gate electrode 22 is formed in the opening via the gate insulating film 15.

[0047] In addition, on the back surface of the substrate 11, that is, on the side opposite to the side on which the semiconductor layer is formed, a drai...

Example

[0064] Second embodiment

[0065] Next, according to Figure 6 to Figure 8 The method of manufacturing a semiconductor device of the second embodiment will be described.

[0066] First, like Image 6 As shown in part (a), the MOVPE method + A buffer layer (not shown) is formed on a substrate 11 made of SiC, and an n-GaN layer 12, a p-GaN layer 13, and an n-GaN layer 14 are laminated and formed on the buffer layer.

[0067] Then, like Image 6 As shown in part (b), an opening 41 is formed in a region where the gate electrode 22 to be described later is to be formed.

[0068] Then, like Image 6 As shown in part (c) of, the gate insulating film 15 is formed inside the opening 41 and the surface of the n-GaN layer 14, and the gate electrode 22 is formed inside the opening 41 via the gate insulating film 15.

[0069] Then, like Figure 7 As shown in part (a), the source electrode 21 is formed.

[0070] Then, like Figure 7 As shown in part (b), an insulating film 132 that becomes a back insu...

Example

[0076] The third embodiment

[0077] Next, according to Figure 9 to Figure 11 The method of manufacturing the semiconductor device of the third embodiment will be described.

[0078] First, like Picture 9 As shown in part (a), through the MOVPE method, +- A buffer layer (not shown) is formed on a SiC substrate 11, and an n-GaN layer 12, a p-GaN layer 13, and an n-GaN layer 14 are laminated and formed on the buffer layer.

[0079] Then, like Picture 9 As shown in part (b), an opening 41 is formed in a region where the gate electrode 22 to be described later is to be formed.

[0080] then, Picture 9 As shown in part (c) of, the gate insulating film 15 is formed inside the opening 41 and the surface of the n-GaN layer 14, and the gate electrode 22 is formed inside the opening 41 via the gate insulating film 15.

[0081] Then, like Picture 10 As shown in part (a), the source electrode 21 is formed.

[0082] Then, like Picture 10 As shown in part (b), on the back surface of the substrat...

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Abstract

Provided is a semiconductor device which is characterized by comprising: a first semiconductor layer of a first conductivity type formed on one surface of a conductive semiconductor substrate; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer; a third semiconductor layer of the first conductivity type formed on the second semiconductor layer; an opening portion that is formed by removing parts of the third semiconductor layer, the second semiconductor layer and the first semiconductor layer; a gate insulating film that is formed so as to cover the inner wall of the opening portion; a gate electrode that is formed in the opening portion with the gate insulating film interposed therebetween; a source electrode that is formed on the surface of the third semiconductor layer; a drain electrode that is connected to the other surface of the semiconductor substrate at a position corresponding to the gate electrode; and a fourth electrode that is formed on the other surface of the semiconductor substrate at a position corresponding to the source electrode. Consequently, leakage current can be reduced in the semiconductor device, which has high breakdown voltage and small chip size.

Description

technical field [0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. Background technique [0002] Nitride semiconductors such as GaN, AlN, and InN not only have a wide band gap, but also have excellent material properties, so they can be used in high-voltage electronic devices and short-wavelength light-emitting devices. In particular, with regard to field effect transistors (FET, Field Effect Transistor), which are high withstand voltage electronic devices, research has been conducted on high electron mobility transistors (HEMT, High Electron mobility Transistor), and they can be used in high-power, high-efficiency amplifiers Or high power switching equipment, etc. [0003] However, in HEMTs with a conventional lateral structure (a structure in which current flows substantially parallel to the substrate surface), it is necessary to increase the size of the electrode if it is to secure a sufficient withstan...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L21/336H01L29/12
CPCH01L29/0653H01L29/0657H01L29/0886H01L29/2003H01L29/267H01L29/402H01L29/407H01L29/41741H01L29/66734H01L29/7813H01L29/7831H01L29/66666H01L29/7827
Inventor 多木俊裕西森理人今田忠纮
Owner FUJITSU LTD
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