Digital interface radio frequency chip and implementation method thereof

Abstract

The invention discloses a digital interface radio frequency chip and an implementation method thereof. The digital interface radio frequency chip comprises a receiving antenna, a radio frequency analog front-end subsystem and an analog baseband subsystem, wherein the analog baseband subsystem comprises an oversampling analog-to-digital converter, an internal clock generating module, a digital signal processor and a multiplexing parallel module, an output end of the receiving antenna is connected with an input end of the multiplexing parallel module through the radio frequency analog front-end subsystem, the oversampling analog-to-digital converter and the digital signal processor sequentially, and an output end of the internal clock generating module is connected with a clock input end of the oversampling analog-to-digital converter and a clock input end of the multiplexing parallel module respectively. According to the digital interface radio frequency chip, clocks generated inside the radio frequency chip serve as reference clocks, so that the correctness of the baseband chip data collection can be guaranteed; and no complex first-in first-out (FIFO) structure is required, the structure is simple, the integration is easy, and the cost and the power consumption are reduced. The digital interface radio frequency chip and the implementation method thereof are widely applied in the technical field of communications.

Description

technical field [0001] The invention relates to the technical field of communication, in particular to a digital interface radio frequency chip and an implementation method thereof. Background technique [0002] Glossary: [0003] ABB: analog baseband; [0004] BBPLL: baseband phase-locked loop; [0005] ADC: analog-to-digital converter; [0006] FIFO: first in first out data buffer; [0007] DSP: digital signal processing; [0008] GLITCH: Glitch. [0009] The digital interface radio frequency chip refers to the radio frequency chip, which not only includes the original radio frequency analog front end, but also integrates the functions of ABB. Since the digital interface RF chip has the ABB function, it can directly output digital signals to the baseband chip for processing, which can save the original analog baseband chip in the terminal solution and save the cost of each terminal. However, the integration of ABB will bring a difficult problem, that is how to effec...

AI Technical Summary

Problems solved by technology

This GLITCH is used as the jitter on the reference clock of the BBPLL, which will also cause the BBPLL to re-lock, causing the output data of the RF chip to be disordered

[0015] To sum up, the existing digital interface radio frequency chip generally adopts FIFO structure, its structure is complex, and the integrated chip area is large, resulting in high cost and high power consumption of the chip

At the same time, because the RF chip uses an external clock as a reference clock, the data output by the RF chip will be disordered.

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