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Fabrication method of substrate with patterned insulating buried layer

A technology of insulating buried layer and fabrication method, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as damage to the top semiconductor layer, hindering lattice recovery, etc., and achieve the effect of low defect density and good insulation performance.

Active Publication Date: 2015-08-26
SHANGHAI SIMGUI TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The prior art patterned SOI substrate is formed by isolated oxygen implantation (SIMOX) process, the disadvantage is that the top device layer has obvious defects at the position corresponding to the edge of the patterned buried layer, which is caused by ion implantation The damage of the top semiconductor layer, which is originally recovered by annealing after implantation, but because the insulating buried layer is patterned, there will be thermal adaptation stress at the edge of the patterned buried layer during the annealing process, which is A stress hinders the recovery of the crystal lattice, thus forming defects

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  • Fabrication method of substrate with patterned insulating buried layer
  • Fabrication method of substrate with patterned insulating buried layer
  • Fabrication method of substrate with patterned insulating buried layer

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Embodiment Construction

[0016] The specific implementation of the method for fabricating a patterned buried insulating layer provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0017] Attached figure 1 Shown is a schematic diagram of the implementation steps of the method described in this embodiment, including: step S100, providing a supporting substrate and a device substrate; step S110, forming a groove in the surface of the supporting substrate for bonding; step S121, Deposit insulating materials on the surface of the supporting substrate and the grooves, thereby forming a continuous buried insulating layer on the surface of the supporting substrate; step S122, thin the surface of the buried insulating layer until the surface of the supporting substrate is exposed, thereby forming a patterned insulation Buried layer; step S130, bonding the device substrate and the supporting substrate together; step S140, thinning the device substrate to ...

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Abstract

The invention provides a manufacturing method for a substrate with a graphical insulating buried layer. The method comprises the followings: providing a supporting substrate and a device substrate; forming a groove on the surface of the supporting substrate, which is used for bonding; adopting insulating material to fill the groove so as to form the graphical insulating buried layer; bonding the device substrate and the supporting substrate together; and reducing the thickness of the device substrate to reach a predetermined thickness. The manufacturing method provided by the invention has the advantages that the graphical insulating buried layer is formed by adopting sediment or thermal oxidation process, so that the insulating property is excellent, the device substrate is prevented from injection influences, the defect density is low, and particularly, defects are prevented from being formed in a part corresponding to a graphical boundary.

Description

Technical field [0001] The invention relates to the field of integrated circuit material manufacturing, in particular to a method for manufacturing a substrate with a patterned buried insulating layer. Background technique [0002] SOI devices have floating body effects and self-heating effects, and patterned SOI materials are one of the ways to solve the above problems. One of the simplest and most economical methods to overcome the floating body effect and self-heating effect of SOI devices is to remove the buried insulating layer under the device channel to form a patterned buried layer. [0003] In addition, in order to obtain more powerful and cheaper chips, integrating multiple functions (such as logic circuits, memory, etc.) on SO1 substrates to form a system chip (SOC) is also one of the research hotspots in the field of integrated circuits today. However, there are some circuits, such as RF circuits, imaging circuits, and DRAMs, whose manufacturing processes on SOI substr...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/762
Inventor 叶斐张峰
Owner SHANGHAI SIMGUI TECH