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Processing method for layout data

A technology for layout data and processing methods, which is applied in special data processing applications, originals for opto-mechanical processing, and photoengraving processes for patterned surfaces. size, etc.

Active Publication Date: 2013-09-18
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The pattern spacing dimension a after OPC correction is obviously larger than the distance between the original pattern 2, which may exceed the mask manufacturing process capability, resulting in a difference between the mask size and the layout, affecting the actual size of the lithography
[0005] The current solutions are as follows: the first method is to improve the manufacturing specifications of the mask, which can improve the manufacturing process capability of the mask and solve the situation that the hole spacing is too small. The disadvantage is that it will increase the manufacturing cost of the mask; the second method . When performing OPC correction, keep the minimum mask pitch size so that it will not violate the minimum precision of the mask manufacturing process. The disadvantage is that the OPC correction is not in place, and the actual lithography size cannot reach the target value

Method used

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Embodiment Construction

[0021] In order to make the content of the present invention clearer and easier to understand, the content of the present invention will be described in detail below in conjunction with specific embodiments and accompanying drawings.

[0022] figure 2 A flow chart of a method for processing layout data according to an embodiment of the present invention is schematically shown.

[0023] Specifically, as figure 2 As shown, the layout data processing method according to the embodiment of the present invention includes:

[0024] First step S1: generate initial layout data including square graphics, for example, as image 3 with Figure 4 As shown, the initial layout data includes a square original pattern 2, and the square original pattern 2 represents the actual circular hole pattern 1 on the wafer.

[0025] Second step S2: performing OPC correction on the initial layout data.

[0026] After the OPC correction, the corrected pattern 3 corresponding to the original pattern ...

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Abstract

The invention provides a processing method for layout data. The processing method comprises the following steps of: generating initial layout data including square graphs; performing optical proximity correction (OPC) on the initial layout data; performing mask plate minimum rule checking on the layout data subjected to the OPC to find out the square graphs which break a mask plate minimum rule; and modifying the layout data subjected to the OPC, so that at least part of the square graphs which break the mask plate minimum rule can be rotated by a specific angle to form rotated square graphs, wherein the square graphs rotate around the centers, which serve as rotating centers, of the square graphs. According to the processing method, the technical problem that a graph breaks the mask plate minimum rule is solved through layout data processing; under the condition that the cost is not increased or the OPC accuracy is not reduced, the hole-pitch size of a mask plate subjected to OPC can be enlarged; therefore, original layouts which break the mask plate minimum manufacturing precision can meet the requirement.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, and more specifically, the invention relates to a method for processing layout data. Background technique [0002] With the design and manufacture of integrated circuits entering the ultra-deep submicron stage, the feature size of the device is close to or even smaller than the wavelength of light used in the photolithography process. Therefore, due to light diffraction and interference phenomena in the photolithography process, there are certain deformations and deviations between the photolithography pattern obtained on the actual silicon wafer and the mask pattern. Such errors in lithography directly impact circuit performance and production yield. In order to eliminate this error as much as possible, an effective method is OPC (Optical Proximity Correction, optical proximity correction or optical proximity effect correction). [0003] Specifically, in the photolithography process,...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G03F1/36
CPCG06F30/398G06F30/392
Inventor 张辰明张旭升魏芳
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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