Processing method for layout data

Abstract

A method of layout pattern modification includes the following steps: step 1: performing an OPC process on a layout containing a plurality of square patterns to obtain a plurality of post-OPC patterns in correspondence with the plurality of square patterns; step 2: performing a manufacturing rule check on each of the plurality of post-OPC patterns to identify, from the plurality of post-OPC patterns, one or more post-OPC patterns violating the manufacturing rule; and step 3: rotating at least one of the one or more post-OPC patterns violating the manufacturing rule; and step 4: performing a manufacturing rule check on each of the rotated and non-rotated post-OPC patterns, if no post-OPC pattern violating the manufacturing rule is identified, finishing the process; otherwise, if one or more post-OPC patterns violating the manufacturing rule are identified, continuing to perform step 3 and step 4.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, and more specifically, the invention relates to a method for processing layout data. Background technique [0002] With the design and manufacture of integrated circuits entering the ultra-deep submicron stage, the feature size of the device is close to or even smaller than the wavelength of light used in the photolithography process. Therefore, due to light diffraction and interference phenomena in the photolithography process, there are certain deformations and deviations between the photolithography pattern obtained on the actual silicon wafer and the mask pattern. Such errors in lithography directly impact circuit performance and production yield. In order to eliminate this error as much as possible, an effective method is OPC (Optical Proximity Correction, optical proximity correction or optical proximity effect correction). [0003] Specifically, in the photolithography process,...

AI Technical Summary

Problems solved by technology

The pattern spacing dimension a after OPC correction is obviously larger than the distance between the original pattern 2, which may exceed the mask manufacturing process capability, resulting in a difference between the mask size and the layout, affecting the actual size of the lithography

[0005] The current solutions are as follows: the first method is to improve the manufacturing specifications of the mask, which can improve the manufacturing process capability of the mask and solve the situation that the hole spacing is too small. The disadvantage is that it will increase the manufacturing cost of the mask; the second method . When performing OPC correction, keep the minimum mask pitch size so that it will not violate the minimum precision of the mask manufacturing process. The disadvantage is that the OPC correction is not in place, and the actual lithography size cannot reach the target value

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