Layout Layer Design Method of Semiconductor Chip and Mask Plate

Abstract

The invention provides a layout-layer designing method of a semiconductor chip, which comprises the following steps of making an OPC (Optical Proximity Correction) rule according to photo-etching process capability; placing graphs needing OPC in an original complete layout onto a first sub-layer according to an OPC classifying standard and the OPC rule, and placing graphs needing no OPC onto a second sub-layer; carrying out OPC operation on the first sub-layer to form the operated first sub-layer; and integrating the operated first sub-layer with the second sub-layer to form the photo-masking data of the required layout. The invention also provides a masking plate utilizing the layout-layer designing method of the semiconductor chip. In the layout-layer designing method of the semiconductor chip provided by the invention, the OPC for the first sub-layer only needs to be carried out without any processing on the second sub-layer, so that the actual calculated amount and the calculated graph area are greatly reduced, the calculating efficiency is greatly improved, the work efficiency of an operation server is improved, and the publication period of a product is shortened.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a layout layer design method of a semiconductor chip and a mask plate thereof. Background technique [0002] In advanced semiconductor manufacturing processes, optical proximity correction is required for design layouts to improve the manufacturability of graphics. Especially in the deep submicron semiconductor chip manufacturing process, since the line width of the key pattern is much smaller than the wavelength of the light source, the diffraction effect of light will cause distortion of the pattern projected on the silicon wafer by the mask, and even cause the pattern to exceed the acceptable range. graphics distortion. Typical effects are: wire end shortening, rounded corners and critical dimension shifts, etc. The effect of this optical diffraction distortion is affected by the surrounding graphics environment, which is called optical proximity effects....

AI Technical Summary

Problems solved by technology

[0009] The purpose of the present invention is to provide a semiconductor chip layout layer design method and its mask plate to solve the problems of low accuracy, low calculation efficiency and short period of existing optical proximity correction

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