Four-knot cascade solar cell with Si substrate and preparation method thereof

Abstract

The invention relates to the field of a semiconductor technology, in particular to a four-knot cascade solar cell which comprises a first bonding layer, an InGaAsP / InGaAs double-knot cell, a second bonding layer, a third bonding layer and a GaInP / GaAs double-knot cell, wherein the first bonding layer, the InGaAsP / InGaAs double-knot cell, the second bonding layer, the third bonding layer and the GaInP / GaAs double-knot cell are arranged from bottom to top in sequence on a Si substrate. The InGaAsP / InGaAs double-knot cell and the GaInP / GaAs double-knot cell are connected in series on the Si substrate. The invention further provides a preparation method for the solar cell. The Si substrate used as the supporting substrate has good mechanical strength. Meanwhile, the method that the double-knot cells are subjected to bonding and then growing thin layers are assembled on the double-knot cells is adopted, the GaAs and InP thin layer bonding method achieves lattice match growth of the four-knot cell, and the crystalline quality of materials is guaranteed compared with lattice mismatch growth.

Description

technical field [0001] The invention relates to the technical field of semiconductor materials, in particular to a structure of a four-junction cascaded solar cell and a preparation method thereof. Background technique [0002] As an ideal green energy material, solar cells have become a research hotspot in various countries. In order to promote the further practical application of solar cells, improving their photoelectric conversion efficiency is an effective means to reduce the cost of power generation. The use of sub-cells with different bandgap widths in series in stacked cells can greatly improve the utilization rate of sunlight. At present, the system with more research and more mature technology is the GaInP / GaAs / Ge triple-junction cell. The highest conversion efficiency achieved so far is 32-33%. However, the Ge-bottom cell in the triple-junction cell covers a wider spectrum, and its short-circuit current is relatively large. In order to achieve current matching wi...

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Problems solved by technology

Due to the 2.1% lattice mismatch between 1.0eV InGaAs and GaAs, its crystal quality is difficult to improve

For example, from the perspective of lattice matching, the bonding of GaInP / GaAs (1.9eV / 1.42eV) based on GaAs substrate and InGaAsP / InGaAs (1.05eV / 0.74eV) of InP substrate is used to bond double junction cells, wafer bonded cells Two substrates, GaAs and InP, are required. Conventional wafer bonding technology requires GaAs and InP two substrates with a larger thickness (about 350 μm) to grow, which increases the cost of the battery and pollutes the environment.

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