Semiconductor on insulator structure and manufacturing method thereof

Abstract

One aspect of the invention is to provide a semiconductor on insulator (SOI) structure which comprises a substrate (100), a crystal dielectric layer (101) formed on the substrate (100) and a crystal device layer (102) formed on the crystal dielectric layer (101). Accordingly, the invention further provides a manufacturing method of the semiconductor on insulator structure. The method comprises the following steps of providing the substrate (100); forming the crystal dielectric layer (101) on the substrate (100); and forming the crystal device layer (102) on the crystal dielectric layer (101). According to the semiconductor on insulator structure and the manufacturing method thereof, a semiconductor substrate or an SOI substrate is adopted as a base and then the crystal dielectric layer and the crystal device layer are formed, material is saved, and the cost is reduced; and as the crystal dielectric layer is directly formed on the surface of the substrate, the defect of the crystal dielectric layer can be reduced, and the quality of an SOI can be improved.

Description

technical field [0001] The present invention relates to the field of semiconductor material-based integrated circuit manufacturing, in particular to a semiconductor-on-insulator (semiconductor on insulator, SOI) structure and a manufacturing method thereof. Background technique [0002] SOI substrate generally includes device layer, dielectric layer and substrate structurally. A dielectric layer is located between the device layer and the substrate. The structure of SOI can completely isolate the device on the device layer from the substrate, substantially reduce junction capacitance and leakage current, increase switching speed, reduce power consumption, and realize high-speed and low-power operation. [0003] Currently, SOI preparation technologies mainly include Bonded wafer technique and Smart cut technique. [0004] Figures 7A-7D , is a schematic diagram of the bonding technique. Such as Figure 7A As shown, firstly, the upper surfaces of two silicon wafers 300 are...

AI Technical Summary

Problems solved by technology

However, it is difficult to obtain a large current for a device with a high accelerating voltage, and it takes a lot of time to obtain a predetermined injection amount.

Therefore, the cost becomes high, and the method is not practical in mass production.

And when bonding two silicon wafers through the oxide layer, it is difficult to ensure that the contact surface is flat and free of defects, so the quality of the finished SOI is difficult to control

Images