High-PSR (high power supply rejection) low-dropout regulator with slew rate enhancement circuit integrated thereto

A low-dropout linear, integrated slew rate technology, applied in instruments, regulating electrical variables, control/regulating systems, etc., can solve problems such as increasing circuit complexity, reducing load capacity, increasing output voltage noise, etc., to enhance power supply rejection. capability, slew rate enhancement, and the effect of improving transient response

Active Publication Date: 2013-11-20
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to overcome the shortcomings of the current low dropout linear regulators that mostly solve the problem of output voltage spikes at the cost of increasing circuit complexity, reducing load capacity, and increasing output voltage noise, and provides an integrated slew rate enhancement circuit. High PSR Low Dropout Linear Regulator

Method used

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  • High-PSR (high power supply rejection) low-dropout regulator with slew rate enhancement circuit integrated thereto
  • High-PSR (high power supply rejection) low-dropout regulator with slew rate enhancement circuit integrated thereto
  • High-PSR (high power supply rejection) low-dropout regulator with slew rate enhancement circuit integrated thereto

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Embodiment

[0026] The system block diagram of the high PSR low dropout linear voltage regulator integrated with the slew rate enhancement circuit of the embodiment of the present invention is as follows figure 2 As shown, the schematic diagram of the circuit is shown in image 3shown. The high-PSR low-dropout linear regulator with an integrated slew rate enhancement circuit in this example includes a reference voltage source Vref, an error amplifier, a power supply voltage input terminal, a pass transistor Mp, a resistor feedback circuit, a slew rate enhancement circuit, and a compensation capacitor Cm. The non-inverting input terminal of the error amplifier is connected to the reference voltage source Vref, the inverting input terminal is connected to the resistance feedback circuit, the output terminal is connected to the input terminal of the slew rate enhancement circuit, and the output terminal of the slew rate enhancement circuit is connected to the gate of the adjustment tube Mp ...

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Abstract

The invention relates to power management technologies, solves the problem that generally voltage spike in output voltage is overcome for the existing low-dropout regulator at the costs of increased circuit complexity, decreased load capacity, increased output voltage noise and the like, and provides a High-PSR (high power supply rejection) low-dropout regulator with a slew rate enhancement circuit integrated thereto. According to the scheme, the regulator compared to the existing LDO regulators has the advantages that the slew rate enhancement circuit and a compensation capacitor are added, the positive phase input end of an error amplifier is connected with a reference voltage source, the negative phase input end of the error amplifier is connected with a resistance feedback circuit, the output end of the error amplifier is connected with the input end of the slew rate enhancement circuit, the output end of the slew rate enhancement circuit is connected with a gate of a pass transistor, one end of the compensation capacitor is connected with the negative phase input end of the error amplifier, and the other end of the compensation capacitor is connected with the output end of the error amplifier. The high-PSR low-dropout regulator has the advantages that transient response is enhanced and the scheme is applied to low-dropout regulators.

Description

technical field [0001] The invention relates to power management technology, in particular to the technology of low-dropout linear regulator. Background technique [0002] Low-dropout linear regulator (LDO) is an important circuit in the field of power management, which has the advantages of low output noise, low cost, simple structure, and low power consumption. With the continuous improvement of the power supply requirements of electronic systems, the traditional LDO can no longer meet people's requirements for chip noise, power supply rejection, transient performance and other indicators. Therefore, the study of high-performance LDO has become a research hotspot in the field of power management. [0003] like figure 1 As shown, a typical LDO circuit is generally composed of a reference voltage source Vref, an error amplifier, a power supply voltage input terminal VDD, a regulator tube Mp, and a resistor feedback circuit. The positive input terminal of the error amplifie...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05F1/56
Inventor 刘洋陈讲重汪鹏宁应堂徐汝云于奇
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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