31 results about "Voltage noise" patented technology

A low dropout regulator includes output terminal circuit and amplifier. The output terminal circuit is configured to generate output voltage according to input voltage and is configured to generate feedback voltage according to the output voltage. The amplifier is configured to generate control voltage to the output terminal circuit according to reference voltage and the feedback voltage, so as to adjust the output voltage, wherein the amplifier includes input stage circuit, current mirror circuit and filter circuit. The input stage circuit is configured to receive the reference voltage and the feedback voltage to generate a differential output. The filter circuit is configured to filter the input voltage to generate dependent current related to noise of the input voltage on the current mirror circuit, wherein the current mirror circuit is configured to output the control voltage according to the differential output and the dependent current.

According to the synchronous programmable two-way current source relative deviation calibration device and method, the influence of the thermal effect of the sampling resistor on relative deviation data is avoided through specific connection among the two-way synchronous current source, the programmable resistor module and the sampling resistor. The programmable resistor module is used, and the influence of voltage noise output by the current source on relative deviation data is reduced. According to the invention, the upper computer controls the double-throw switch to act and sends the corresponding response code value to the corresponding synchronous current source for output, so that the relative deviation signal data of the two-way synchronous current source under all output current gears is obtained. Relative deviation signal compensation is carried out on the reference current source, the problem that the deviation of current responding to the same code value is too large under the combined action of the difference value of reference voltage values of two synchronous current sources, the error of a transconductance amplifier and the nonlinear difference of a DAC chip is solved, and then the problem that a superconducting quantum interference device loses lock in a CCC system is solved.

Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may obtain an indication of a set of graphics instructions. The apparatus may also determine whether each graphics instruction in the set of graphics instructions is associated with a resonance frequency that is above or below a threshold. Further, the apparatus may adjust an activity level for each graphics instruction in the set of graphics instructions based on the resonance frequency being above or below the threshold.

The present disclosure provides an operational amplifier current noise testing device and method, relates to the technical field of operational amplifier noise testing, aims to find the position of the introduced pole by testing the input end capacitor, and compensate the influence of the introduced pole of the sampling resistance and stray capacitor through the mathematical correction method, so as to accurately measure the current noise characteristics of the operational amplifier. The device comprises: a device under test module comprising an operational amplifier to be tested and a sampling resistor, wherein the sampling resistor is used to convert the current noise at the input end of the operational amplifier into voltage noise; an auxiliary amplifier module for further amplifying the voltage noise; a capacitor testing module for testing the total input capacitance of the device under test module, the total input capacitance comprising the input capacitance of the operational amplifier itself and the stray capacitance introduced by the system; wherein after the total input capacitance is obtained, the attenuation frequency of the noise signal is corrected according to the total input capacitance to obtain the corrected noise signal.

The present application relates to the field of integrated circuits and photoelectric detection technology, in particular to a low-noise hybrid domain CMOS detector readout circuit.The circuit includes a capacitance feedback transimpedance amplification unit, a switched capacitor reference unit, an analog domain readout unit, a time domain quantization unit and an output selection unit.The transimpedance amplification unit converts the pixel current into voltage.The switched capacitor reference unit filters out the reference voltage noise in the reset stage and maintains the reference potential in the integration stage.The analog domain readout unit outputs analog voltage, and the time domain quantization unit outputs digital time code through saturation time detection.The output selection unit defaults to output analog signal, and switches to digital output when the transimpedance amplifier output voltage reaches the preset threshold.The present application also provides a corresponding readout method.The present application can effectively filter out the reference voltage source noise and power supply ripple, significantly improve the signal-to-noise ratio of micro-light detection, realize high dynamic range in a single frame, significantly expand the linear response range of the detector, and can be integrated on chip.

Systems and methods are disclosed that monitor for supply noise from a power source using a voltage noise monitor (VNM). For instance, the VNM may include voltage sense circuitry comprising a controllable resistor that is controlled using threshold information. The resistance of the controllable resistor may be changed based on closing and / or opening one or more switches associated with step resistors using the bits from the threshold information. Furthermore, the VNM may include digital circuitry that comprises a hold finite state machine and a sticky hold counter. Using the digital circuitry, the VNM may be configured to hold a noise detection event for a plurality of clock cycles. In addition, the VNM may perform a calibration process based on setting two voltages for the power source to obtain two codes, and determining a transfer function based on the two voltages and the two codes.

The application discloses a method and device for arranging attenuators in a read input link and a storage medium, comprising: determining a total attenuation value required by the read input link according to a first thermal noise photon number of a read signal transmitted from a room temperature environment to a read cavity of a quantum chip along the read input link and a second thermal noise photon number of the read cavity when normally working; arranging at least one attenuator in a higher temperature zone and a lowest temperature zone of a refrigerator according to the total attenuation value; determining a total voltage noise power spectral density of all temperature zones according to attenuation values, numbers and temperature zones of the attenuators; determining an equivalent temperature of the read cavity according to the total voltage noise power spectral density; and judging whether the equivalent temperature is lower than a threshold value, if yes, the arrangement of the attenuators is reasonable, and if not, adjusting the number and / or attenuation value of the attenuators until the equivalent temperature is lower than the threshold value. The method can accurately select an arrangement of the attenuators whose thermal noise meets the normal working of the quantum chip.

An electronic device according to an embodiment may comprise a port configured to receive an alternating current signal. The electronic device may comprise a transistor disposed on a power path extending from the port and configured to control transmission of the alternate current signal. The electronic device may comprise a control circuit configured to generate a control signal to be transmitted to the transistor by using the alternating current signal. The electronic device may comprise a diode connected to a signal path between the control circuit and the transistor and configured to maintain the voltage of the control signal at or below a threshold voltage.

The present invention provides a measuring device and method that can reliably remove high-frequency, high-voltage noise at the start of arc welding and measure the voltage. [Solution] The measuring device is applied to arc welding using a welding machine. The measuring device comprises a measuring instrument for measuring the voltage of the welding machine, a detector for acquiring information to detect the generation and extinction of arc light, an insulating circuit that can be controlled to either an insulating state that insulates the welding machine and the measuring instrument, or an energized state that conducts electricity between the welding machine and the measuring instrument, and an insulating circuit control unit that detects either the generation or extinction of arc light based on the information acquired by the detector, and controls the insulating circuit to either an insulating state or an energized state according to the detected generation or extinction of arc light.

To provide a semiconductor device comprising a switching regulator capable of reducing a voltage noise generated at an output node OUT when transitioning from a Hi-Z state to a lowest frequency operation.SOLUTION: A first control circuit 4 generates a first control signal LGCTL in response to a rise of a feedback voltage FB or assertion of a MINF state signal SMINF. A second control circuit 5 generates a second control signal LGCTLD by which the first control signal LGCTL is delayed, and a third control signal LGDVB thereof. The third control signal LGDVB performs same operation as an inverted signal of the second control signal LGCTLD when the MINF state signal SMINF is negated, and is negated when he MINF state signal SMINF is asserted. A low potential side pre-driver 6 outputs a driving signal LG in response to the second control signal LGCTLD and the third control signal LGDVB, and reduces a slew rate of the driving signal LG when the third control signal LGDVB is negated.SELECTED DRAWING: Figure 1

In an example, a CAN transceiver includes a first transistor having a control terminal, having a drain coupled to a voltage supply terminal, and having a source. The CAN transceiver includes a second transistor having a drain coupled to a control terminal of the first transistor, a source coupled to the source of the first transistor, and a control terminal. The CAN transceiver includes a bias circuit coupled to the control terminal of the second transistor, the second transistor configured to convert the first transistor to a diode configuration responsive to detecting high voltage noise.

This void ratio acquisition method includes: a measurement results acquisition step of acquiring measurement results by measuring, over a predetermined time period, the voltage in a gas-liquid two-phase flow by using a probe; a frequency distribution creation step of creating a frequency distribution indicating the frequency of voltage values; a phase discrimination step of determining, as a liquid phase level voltage, the value of the voltage of a first peak which is the most frequent; a noise acquisition step of acquiring, as noise, the frequency of the value of the voltage having a small absolute value with respect to the liquid phase level voltage; and a void ratio acquisition step of taking the difference of noise from the frequency of the value of a voltage having a large absolute value with respect to the liquid phase level voltage, acquiring a frequency, from which the noise was removed, as a frequency ratio of the gas phase in the gas-liquid two-phase flow, and acquiring a frequency ratio of the gas phase as a void ratio.

The invention discloses a high-stability and high-power-supply-rejection-ratio LDO based on a BCD technology. The LDO comprises a pre-voltage-stabilizing circuit, a biasing circuit a, a biasing circuit b, a band-gap reference operational amplifier, a band-gap reference circuit, an error amplifier, a low-voltage-to-high-voltage-stage amplifier, a frequency compensation circuit and a power-stage amplifier. A high-voltage power supply domain is converted into a low-voltage power supply domain by utilizing the pre-voltage-stabilizing circuit, and a low-voltage power supply is provided for the band-gap reference circuit and the error amplifier; by isolating a high-voltage noise path and a low-voltage core circuit, the proportion of a high-voltage MOS (Metal Oxide Semiconductor) tube is reduced, and the power supply rejection ratio is improved; the low-frequency characteristic and the loop stability of the LDO are improved by adopting a pseudo ESR compensation technology and matching with a cyclic folded cascode structure; a band-gap reference and pre-voltage-stabilizing technology of a current mode structure is adopted to improve the power supply rejection ratio; the LDO with high stability and high power supply rejection ratio can meet the application requirements of high stability and high power supply rejection ratio, and can be applied to various driving chips.

A laser frequency noise evaluation method for an atomic spin precession detection system comprises the steps that beat frequency signals are obtained through beat frequency of detection laser and reference laser, direct-current voltage forming a linear function relation with the beat frequency signal frequency is obtained through a frequency-to-voltage converter, and then a voltage noise spectrum is analyzed through a spectrum analyzer; and finally, analyzing the influence of the frequency noise in combination with a detection noise spectrum density recording result, thereby quantitatively evaluating the equivalent magnetic noise component in the detection signal caused by the fluctuation of the detection light frequency of the atomic spin precession detection system. Detection noise suppression can be realized through a noise separation method, and the detection sensitivity is improved.

The invention discloses a voltage signal acquisition module for a quantum precision measurement device. The voltage signal acquisition module comprises seven parts, namely a weak voltage signal, a correlated double-sampling differential input circuit, a front-end analog signal amplifying and conditioning circuit, a high-precision ADC analog-to-digital conversion circuit, a digital control and signal processing unit, an embedded display control screen and a linear isolation voltage-stabilized power supply. The invention also discloses a sampling method. Target voltage signals and circuit voltage noise are effectively separated through the correlated double-sampling differential input circuit, weak voltage signal extraction is achieved, and the key technical problem of weak voltage signal collection in a quantum precision measurement device is effectively solved through the integrated design of hardware optimization and software processing.

The invention discloses a dual-power dynamic reconstruction method, which relates to the technical field of power electronics, and comprises the following steps: S001, monitoring background voltage, noise spectrum and transient energy of a control signal transmission channel in real time, extracting interference characteristics, and generating an interference early warning index; s002, constructing a confidence factor model based on the interference early warning index in combination with the time sequence consistency, the trigger stability and the historical evolution path of the control signal, and judging the effectiveness and the integrity of the control signal; and S003, on the basis that the control signal is judged to be effective, performing redundancy cross validation, and through comparison of multi-channel edge characteristics and an arrival time sequence, establishing a consistency voting mechanism and eliminating asynchronous pulses and burst flip signals. The control signal recognition accuracy is improved through interference early warning, confidence judgment, cross validation, signal shaping and other mechanisms, self-adaptive interference rejection is achieved through a feedback driving optimization strategy, and the power supply reliability and safety of the dual-power-supply system in a complex environment are effectively guaranteed.

The invention discloses a novel low-noise band-gap reference circuit, and belongs to the field of analog integrated circuits, the novel low-noise band-gap reference circuit comprises a band-gap reference core module and an operational amplifier module, the band-gap reference core module uses the difference of VBE of a BJT tube working under different current densities as PTAT voltage, the PTAT voltage is superposed with CTAT voltage to generate reference voltage with a zero temperature coefficient, and the operational amplifier module is connected with the operational amplifier module. The operational amplifier module adopts a double-pair operational amplifier structure to increase delta VBE, so that the amplification coefficient of band-gap reference voltage noise is reduced, noise suppression is achieved, and compared with a traditional band-gap reference source achieving the same noise suppression degree, the power consumption requirement is reduced. The circuit has the advantage of being easy to use, and is suitable for low-noise and high-precision application scenes.

The invention provides a ship experiment generator set excitation loop time constant negative resistance compensation method and system, and the method comprises the steps: measuring the cold state data of a simulation set excitation winding, constructing a real-time resistance function changing with the temperature, and carrying out the back calculation of the needed target total resistance according to the target time constant of a prototype. And in combination with the real-time current and temperature, a compensation voltage which is injected by the series power converter and is opposite to the thermal error voltage noise in phase is calculated and injected by the series power converter. And performing empirical mode decomposition and Hilbert transform on the compensated current signal, analyzing the instantaneous frequency characteristic of the compensated current signal, generating a frequency domain compensation instruction, and superposing the frequency domain compensation instruction to a control signal. The gain coefficient of the negative resistance compensator is dynamically corrected by comparing the deviation between the ideal output of a digital reference model and the real-time current. According to the method, the technical problem that the experimental result cannot accurately reflect the dynamic characteristics of a real system due to excitation time constant mismatch caused by inconsistency of physical parameters of a simulation unit and a prototype is solved.

The invention relates to the technical field of intelligent agricultural information, in particular to an improved intelligent agricultural information system based on power line carrier communication, which comprises an interference identification module for collecting voltage, noise and signal fluctuation, extracting an interference line and drawing a power trend graph, and a frequency band optimization module for denoising and sequencing frequency bands and forming a priority table, the transmission screening module distributes frequency bands and tracks stability to form a stable path set, the response comparison module analyzes feedback differences to form an abnormal node list, and the path allocation module replaces cross paths to form a dynamic matching table. According to the invention, by analyzing the voltage change and the noise frequency, the interference line is identified, the power diagram is drawn, and the signal path is optimized. After interference frequency bands are removed, the frequency bands are distributed according to priorities, and stable signal transmission is ensured. Signal continuity is maintained through path screening, and data stability is improved. The control comparison and path allocation identify abnormity and adjust the path, the stability is optimized, the interference is reduced, and the system efficiency is improved.

This invention discloses a communication interface isolation and protection device, comprising a first communication interface, a second communication interface, a magnetic coupling conversion unit, a first transient noise suppression module, a first power supply integral voltage regulator module, and a second transient noise suppression module. The first and second transient noise suppression modules suppress transient noises such as lightning surges, EFTs, and electrostatic discharges from the interface device, and partially protect against continuous high-voltage noise. The power and data signals, after transient noise has been filtered out, are respectively sent to the first and second power supply integral voltage regulator modules and the magnetic coupling conversion unit. The first and second power supply integral voltage regulator modules then rectify, integrate, and stabilize the weak current on the communication line to the magnetic coupling conversion unit. The magnetic coupling conversion unit exchanges the data signals at both ends, achieving complete isolation of the signal power supply on both sides. This design is simple in structure and saves on production costs.

It suppresses voltage surges and voltage noise during switching. [Solution] The nitride semiconductor device 10 includes a conductive substrate 11, a nitride semiconductor layer 15 located on the conductive substrate 11, a transistor 100 that includes a part of the nitride semiconductor layer 15 and has a gate electrode 24, a source electrode 28, and a drain electrode 30 located on the nitride semiconductor layer 15, and a snubber circuit 200 connected in parallel to the source electrode 28 and the drain electrode 30. The conductive substrate 11 is electrically connected to the source electrode 28. The snubber circuit 200 includes a snubber resistor 201 located on the nitride semiconductor layer 15 and electrically connected to the drain electrode 30, and a snubber capacitor 210 electrically connected to the snubber resistor 201 and the conductive substrate 11 and including parasitic capacitance formed by the nitride semiconductor layer 15.

A method, system, and computer program product are disclosed for implementing enhanced noise impact on function (NIOF) analysis of an IC design having nets in multiple different variable voltage domains next to each other and modeling all multiple worst-case victim-aggressor voltage configurations in a single run leveraging noise abstracts characterized at a single voltage corner. The NIOF analysis enables accurately identifying incorrect victim switching or functional fails, effectively and efficiently providing design verification and the ability to sign-off an IC design with a single run, and enable modifying an integrated circuit design to fix NIOF failures, and fabricating an integrated circuit.

The application discloses a logic circuit and method for improving power conversion product up and down power operation stability, which comprises an up power shielding protection circuit, a de-bounce processing circuit, a protection logic execution circuit, a down power self-help discharge circuit and a protection execution device; the up power shielding protection circuit is used for shielding a false protection signal in a product up power process; the de-bounce processing circuit is used for shielding voltage noise and burr in a starting up power and normal protection logic process; the protection logic execution circuit is used for generating a signal for executing protection logic; the down power self-help discharge circuit is used for timely discharging charges stored in a capacitor of the up power shielding protection circuit in a product down power process; and the protection execution device is used for executing a logic protection action. The application can effectively solve product working stability and fault tolerance problems.

The present application provides a PDF prediction method based on impulse response PDN network voltage noise, which is used to solve the problem of excessive design of power distribution network caused by large error of result when predicting the voltage noise of the entire power distribution network according to the worst current of a single transistor and ignoring the probability of occurrence of the worst voltage noise of the power distribution network. The implementation steps are: generating an impulse response waveform of the time domain simulation of the power distribution network; generating a pulse vector of the impulse response waveform; calculating a response voltage vector of the input current of the power distribution network; calculating a probability vector corresponding to the response voltage vector; predicting the voltage noise and the probability density distribution of the power distribution network. The present application can efficiently and accurately predict the voltage noise and the probability density distribution of the power distribution network, and can provide a reference for analyzing the power integrity when designing the PDN network.

The invention belongs to the technical field of electronic test instruments, and particularly relates to a signal generator analog channel structure and method for reducing signal floor noise, and the structure is sequentially connected with a first-stage amplification unit, a first attenuation network, a second-stage amplification unit, a second attenuation network and a power amplification unit along a signal transmission direction. Wherein the second-stage amplification unit adopts N operational amplifiers (N is greater than or equal to 2) which are arranged in parallel, and the noise density of the input reference voltage is remarkably reduced by utilizing the synchronous amplification effect of the parallel operational amplifiers on signals and the averaging effect on internal noise. In addition, each attenuation network adopts a passive resistance network controlled by a relay, so that nonlinear distortion and power supply noise introduced by an active switch are avoided. Through the synergistic effect of preceding-stage high-gain distribution, parallel operational amplifier noise reduction and relay passive attenuation, the overall bottom noise of an analog channel is effectively reduced, and the signal-to-noise ratio during small signal output is remarkably improved.

The utility model relates to the field of chip packaging, in particular to a chip module and electronic equipment. The chip module comprises a printed circuit board, a chip packaging structure and a capacitor, the printed circuit board comprises a first surface, a second surface and a plurality of through holes penetrating through the first surface and the second surface, the first surface and the second surface are oppositely arranged, the chip packaging structure faces the first surface, the chip packaging structure comprises a power supply gate ball area, and the power supply gate ball area is provided with a plurality of power supply gate balls. The chip packaging structure is connected with the plurality of through holes through part of the power grid balls, the capacitor faces the second surface, and part of the capacitor crosses an area not connected with the through holes and is connected with the printed circuit board. According to the chip module provided by the utility model, the second surface of the printed circuit board is provided with a space for arranging a large-size high-capacity capacitor, and the capacitor can provide timely and sufficient charge supply, so that voltage fluctuation is stabilized, and transient alternating voltage noise on a power supply plane path is suppressed.

The present invention relates to a method for assessing the quality of a battery cell in a battery-cell-manufacturing process, the method comprising: passively measuring at least a voltage noise signal of at least a battery cell, processing the at least one voltage noise signal into a structured data set, analyzing the structured data set and extracting at least a characteristic descriptor from the structured data set, establishing at least a relation between the at least one characteristic descriptor and at least a performance indicator of the at least one battery cell The present invention also relates to a corresponding system.

This invention belongs to the field of proton exchange membrane fuel cell condition monitoring and fault diagnosis technology. It discloses a broadband impedance measurement excitation signal design method based on electrochemical noise optimization, comprising: selecting a discrete interval binary sequence (DIBS) as the excitation signal; predicting the power spectrum of the measured battery voltage noise using an AR model; establishing an electrochemical noise equivalent circuit model of the battery based on the battery equivalent circuit model parameters and the AR model; synthesizing the DIBS based on the current harmonic number, signal-to-noise ratio, and estimated voltage noise power spectrum; and searching for the optimal combination of signal-to-noise ratio and harmonic number based on the synthesized DIBS and combined with the simulation of the battery's electrochemical noise equivalent circuit model to obtain the desired DIBS, which is then used as the impedance measurement excitation signal. This invention can tailor the impedance test excitation signal according to the actual condition of the battery stack, improving measurement accuracy while ensuring measurement speed and reducing interference to the battery system.

Introduced herein is a technique that reliably measures on-die noise of logic in a chip. The introduced technique places a noise measurement system in partitions of the chip that are expected to cause the most noise. The introduced technique utilizes a continuous free-running clock that feeds functional frequency to the noise measurement circuit throughout the noise measurement scan test. This allows the noise measurement circuit to measure the voltage noise of the logic during a shift phase, which was not possible in the conventional noise measurement method. Also, by being able to measure the voltage noise during a shift phase and hence in both phases of the scan test, the introduced technique can perform a more comprehensive noise measurement not only during ATE testing but as part of IST in the field.

An apparatus, the apparatus comprising a first signal receiver circuit, the first signal receiver circuit comprising: a first reference voltage generator configured to generate a first reference voltage, the first reference voltage tracking noise present in a supply voltage used to generate a first single-ended signal; and a first comparator configured to generate a first signal based on a comparison of the first single-ended signal and a first reference voltage.