Semiconductor device

Abstract

The invention discloses a semiconductor device. The semiconductor device comprises a package substrate including a bonding area used for connecting bonding wires; and at least one die provided on the package substrate. Each die comprises a wafer substrate and a pin disposed on the wafer substrate. Each pin is used for connecting the bonding wire. The thickness of each wafer substrate is between 50um to 400um. By thinning the wafer and reducing the thicknesses of the dies, the semiconductor device can reduce the average height of the bonding wires from a ground plane, thereby improving the electrical isolation between the bonding wires and between the bonding wires and other sensitive components, lowering mutual inductance, solving the problem of electromagnetic interference and improving chip performance.

Description

technical field [0001] The present invention relates to the field of semiconductor devices, in particular to a semiconductor device. Background technique [0002] In the semiconductor industry, a chip usually includes a die, a package carrier carrying the die, and other components. Package substrates include but are not limited to various forms such as stacked package substrates, LTCC substrates, and frame substrates. The electrical connection between the chip die and the package carrier is mainly achieved by bonding wires. Bonding wires are widely used in the semiconductor industry due to their advantages in productivity, reliability, and low cost. Bonding wires are usually made of metal materials, including but not limited to gold, copper, aluminum and other materials. According to the specific application requirements for the maximum power that the bonding wire can withstand, the diameter of the metal bonding wire varies from 15um to several hundred um. When the diame...

AI Technical Summary

Problems solved by technology

Electromagnetic interference between these bonding wires and between the bonding wires and other sensitive components forms a signal leakage path inside the chip, allowing power to be coupled to other ports through the leakage path, thereby deteriorating the electrical isolation in the chip package structure performance

[0007] In the related art, how to enhance the electrical isolation between the bonding wires and between the bonding wires and other sensitive components and reduce the mutual inductance in a small-size environment has not yet proposed an effective solution.

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