Optical proximity correction method for mask

Abstract

The invention relates to an optical proximity correction method for a mask. The optical proximity correction method comprises the following steps: (1) preparing a mask pattern and carrying out optical proximity correction to obtain a corrected mask pattern; (2) enlarging the outline of the corrected mask pattern to obtain an enlarged mask pattern; (3) carrying out outline simulation on the enlarged mask pattern to obtain the enlarged mask pattern outline; (4) analyzing the CD (Critical Dimension) of the enlarged mask pattern outline to obtain a CD difference value-deltaCD, wherein the value of the deltaCD is equal to that of an MEEF (Mask Error Enhancement Factor) of the corrected mask pattern; (5) analyzing the MEEF and marking a large region of the MEEF. According to the optical proximity correction method for the mask, the large region of the MEEF is treated when the mask is prepared and then the mask is exposed; the MEEF on a wafer is reduced so that the CD error is reduced to obtain a target pattern; meanwhile, the distortion of the pattern and a circuit is eliminated.

Description

technical field [0001] The invention relates to the field of semiconductors, and in particular, the invention relates to an optical proximity correction method for a mask. Background technique [0002] Integrated circuit manufacturing technology is a complicated process, and the technology is updated very quickly. A key parameter that characterizes integrated circuit manufacturing technology is the minimum feature size, that is, critical dimension (CD). The size of the critical dimension has developed from the initial 125 microns to the current 0.13 microns, or even smaller, precisely because of the critical dimension. The reduction makes it possible to place millions of devices on each chip. [0003] Photolithography is the driving force behind the development of integrated circuit manufacturing processes, and it is also one of the most complex technologies. Compared with other single manufacturing technologies, the improvement of lithography technology is of great signif...

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Problems solved by technology

[0004] With the continuous shrinking of semiconductor integrated circuit CDs, the lithography resolution R must be increased to meet the requirements of the process. According to the formula of Rayleigh's law R=K1λ / NA and DOF=K2λ / (NA)2, where λ is the wavelength, K1 and K2 are constants, and NA is the numerical aperture of the imaging system. It can be seen that the way to improve the resolution is: reduce the wavelength and increase the NA, but this will cause the depth of field to shrink. With the decrease of K1, The mask error enhanced factor (mask error enhanced factor, MEEF) increases, causing the error in lithography to increase, which is more likely to cause distortion, and it is difficult to obtain a stable target CD, such as figure 1 and 2 shown, as figure 1 In the pattern whose target CD is 50nm, the CD obtained on the mask plate is 49nm, but the CD obtained on the wafer after photolithography through the mask plate is 35nm, while the desired CD on the wafer is 35nm. The CD to be obtained is 45nm, so there is a large error. The mask error enhancement (MEEF) factor is 10. When the MEEF is large, OPC will not get good accuracy in time. When the device When the size is further reduced, it is difficult to ensure the stability of the prepared device CD when the MEEF is large, thereby reducing the device preparation efficiency

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