High-speed junction field effect transistor used in bipolar integrated circuit

Abstract

A high-speed junction field effect transistor used in a bipolar integrated circuit forms a conductive epitaxial layer and comprises a drain source area which is opposite to a conductive type and related to a thin channel. A channel area forms a conductive thin surface layer, and a high-speed conductive contact surface is formed on the surface of a middle layer of the drain source area. The contact surface can comprise highly-doped polycrystalline silicon materials on a surface metal layer. The channel below the contact surface and the eptiaxial layer is composed of grid electrodes of the field effect transistor. Due to the fact that the electrical conductivity of the contact surface is increased, the computing speed is improved.

Description

Technical field: [0001] The present invention relates to semiconductor transistor devices in general and to very specific high speed junction field effect transistors. Background technique: [0002] The use of junction field effect transistors in bipolar integrated circuits is known. Fast operation is an important feature of this transistor. The structure of a monolithic bipolar field effect transistor includes top and bottom gates, the top gate contains a lightly doped region in the channel region of the transistor, and the top and bottom gates are electrically connected through the semiconductor structure. The heavily doped region reduces the gate conductance from the 5-15 kOhm / square range to 500-1500 Ohm / square. It is well known that junction field effect transistors have separate upper and lower gate contacts. The prior art shows the use of a barrier metal on the upper gate surface to prevent contact aluminum from penetrating the underlying silicon material. The use...

AI Technical Summary

Problems solved by technology

The use of barrier metals creates a thermal mismatch with silicon, resulting in hysteresis affecting device degradation during thermal cycling

Images