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A kind of jfet device and manufacturing method thereof

A manufacturing method and device technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of low cost and poor constant current accuracy, and achieve the effect of small constant current accuracy and good constant current characteristics

Inactive Publication Date: 2016-05-11
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Its driving circuit has a simple structure and extremely low cost, and the core of providing constant current is a normally-on n-channel JFET device. However, the current JFET device has poor constant current accuracy and cannot well meet the application of constant current source circuits.

Method used

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  • A kind of jfet device and manufacturing method thereof
  • A kind of jfet device and manufacturing method thereof
  • A kind of jfet device and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0053] In this example, three photolithography-three different implantation energies are used to form the gate area, specifically:

[0054] Step 1: Select an NTD single wafer with fewer defects. The thickness of the single wafer ranges from 400 to 700 μm, and the resistivity ranges from 0.001 to 0.005Ω·cm. After marking, cleaning, and drying, it is ready to use, such as Figure 5 shown;

[0055] Step 2: grow an epitaxial layer on the surface of the silicon wafer, the temperature range is 1100 ° C ~ 1150 ° C, the thickness is 5 ~ 25 μ m, and the resistivity is 8 ~ 12 Ω·cm, such as Figure 6 shown;

[0056] Step 3: Thermally grow oxide layer with a thickness of

[0057] The fourth step: a photolithography, after the photolithography, the P+ isolation area is implanted, such as Figure 7 As shown; the body is implanted with glue removal, and a 40-100nm thick oxide layer is grown before implantation. The ion implantation conditions are: dose 1e15-8e15cm -2 , Energy 40~80KeV,...

Embodiment 2

[0072] In this example, three times of photolithography in the gate area - three times of the same energy injection - three times of pushing the junction are used, specifically:

[0073] Step 1: Select an NTD single wafer with fewer defects, with a thickness ranging from 400 to 700 μm and a resistivity ranging from 0.001 to 0.005Ω·cm, marked, cleaned, and dried for use, such as Figure 5 shown;

[0074] Step 2: grow an epitaxial layer on the surface of the silicon wafer, the temperature is 1100°C-1150°C, the thickness is 5-25μm, and the resistivity is 8-12Ω·cm, such as Figure 6 shown;

[0075] Step 3: Thermally grow oxide layer with a thickness of

[0076] The fourth step: a photolithography, after the photolithography, the P+ isolation area is implanted, such as Figure 7 As shown; the body is implanted with glue removal, and a 40-100nm thick oxide layer is grown before implantation. The ion implantation conditions are: dose 1e15-8e15cm -2 , Energy 40~80KeV, redistribu...

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PUM

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Abstract

The invention relates to semiconductor technology, in particular to a JFET device and a manufacturing method thereof. The JFET device of the present invention is characterized in that the junction depth of the P+ gate region 1 is uneven, from one end near the N+ drain region 2 to the junction of the P+ gate region 1 near the N+ source region 3. The depth gradually increases. The beneficial effect of the present invention is that the constant current characteristic is better, and the requirement of smaller constant current precision can be met. The invention is particularly applicable to JFET devices and their fabrication.

Description

technical field [0001] The invention relates to semiconductor technology, in particular to a JFET device and a manufacturing method thereof. Background technique [0002] With the widespread use of LED lamps, LED constant current drivers are rapidly occupying the market. The constant current JFET device is a constant current driver designed for low-power LEDs. It can achieve constant current output in a wide voltage range from 4V to 150V, and It can achieve ±15% constant current accuracy, can be matched with LED lamp beads, and is widely used in indoor lighting. figure 1 It is a solution for driving LEDs with constant current. Due to the high output voltage, this solution is especially suitable for LED applications with a current value of 5mA to 500mA, especially for high-voltage LEDs. The scheme includes a total of 6 components, simple and practical, and low cost. figure 1 Among them, the AC mains directly drives the constant current device and the LED light string after ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/10H01L21/336H01L21/265
CPCH01L21/265H01L29/0847H01L29/1066H01L29/66893H01L29/7832
Inventor 李泽宏刘建赖亚明吴玉舟
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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