Method for encapsulating chips and support plates

Abstract

The invention provides a method for encapsulating chips and support plates. The method comprises the following steps: producing thin-type chip support plates with the total thickness ranging from 70 Mum to 150 Mum, wherein each thin-type chip support plate comprises a dielectric material layer, circuit metal layers stacked and connected by the dielectric material layer and a welding pad 10 Mum-15 Mum protruding out of the dielectric material layer; producing a structural layer, wherein stable structures are arranged at the periphery of the thin-type chip support plate; connecting a chip, wherein the chip is arranged in an accommodating space, and the pin of the chip is connected with a welding pad; filling an injection material, wherein the accommodating space below the chip is filled with the injection material, and the total thickness after encapsulation ranges from 300 Mum to 850 Mum. The total encapsulation thickness and cost are lowered as cementing encapsulation is not needed, and the stable structure can prevent the thin-type chip support plates from bending.

Description

technical field [0001] The invention relates to a packaging method of a chip and a carrier board, in particular, a stable structure is made on a thin carrier board to hold the chip. Background technique [0002] see figure 1 , is a schematic cross-sectional view of a package structure of a chip and a substrate in the prior art. like figure 1 As shown, the packaging structure 200 of the prior art chip and carrier includes a thin chip carrier 1, a chip 50 and Injecting the material 60 and the adhesive molding material 90 . [0003] The first circuit metal layer 16 is embedded in the dielectric material layer 30 and forms a coplanar plane with the dielectric material layer 30 , and the second circuit metal layer 18 fills the other surface formed on the dielectric material layer 30 , and fill the holes in the dielectric material layer 30 to connect with the first circuit metal layer 16 . The thin chip carrier 1 further includes a plurality of pads 24 protruding from the cop...

AI Technical Summary

Problems solved by technology

[0006] In addition, the thickness of the packaging structure of the chip and the substrate is 1.2mm-2.0mm, which is obviously insufficient in the design of light, thin and small electronic products, and the price of the plastic packaging molding material used for plastic packaging (Molding) Expensive, which also makes the cost higher and not competitive in the market

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