FPGA (Field Programmable Gate Array) parallel computing implementation device of support vector machine

Abstract

The invention provides an FPGA (Field Programmable Gate Array) parallel computing implementation device of a support vector machine, which solves the problem of low speed of present software training of SVM (support vector machine). The FPGA parallel computing implementation device of SVM implements a data preprocessing and storage module and a task configuration module on a PC (personal computer) host computer, and implements an SVC (Support Vector Classifier) training module, an SVR (Support Vector Regression) training module and a model test module / . Multiple SVC / SVR training modules can be provided, the VC / SVR training modules divide the training samples into several parts and train the divided training samples simultaneously. The PC host computer and the FPGA perform data transmission through a RS232 communication interface. The FPGA parallel computing implementation device of SVM can be used for processing all the data of real number type, is universal, makes full use of parallelism of FPGA, enables a plurality of SVM modules to perform parallel computation, and greatly improves the training speed of SVM.

Description

technical field [0001] The invention belongs to the field of artificial intelligence, relates to the field of Support Vector Machine (SVM), in particular to a device for realizing parallel calculation of SVM on FPGA (Field Programmable Gate Array, Field Programmable Logic Gate Array). technical background [0002] With the advancement of science and technology and the emergence of a large amount of information and data, machine learning has received more and more attention. The SVM based on the statistical learning theory and the principle of structural risk minimization has high data classification and regression accuracy, and With strong generalization ability, it has become a main method in the field of data classification and regression, and has been successfully applied in fault diagnosis, biomedicine, image processing, text classification and other fields. [0003] The slow training speed of SVM has become the bottleneck of its application in the field of large-scale d...

AI Technical Summary

Problems solved by technology

[0004] The present invention aims at the problem that the speed of the current software training SVM is slow, and proposes a device for realizing parallel calculation of SVM on the FPGA. It can make multiple SVM modules operate in parallel, which greatly improves the training speed of SVM

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