Programmable Built In Self Test (pBIST) system
A technology of embedded memory and test system, applied in the field of built-in self-test system, can solve problems such as insufficient influence and unobservable
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[0014] The SRAM / memory structure of different devices varies by technology, design and implementation. In order to effectively test a memory, the memory test algorithm's sequence of address access patterns should follow a specific pattern that sensitizes and tests electrical structures within the memory.
[0015] In simple memory structures, physical addresses and logical addresses are contiguous and match. Efficient testing can be performed with a simple algorithm that increments or decrements addresses linearly. In these memories, any possible address scrambling automatically matches the input with the output. That is, bit of the input becomes bit of the output, and so on.
[0016] FIG. 1 illustrates a representative prior art integrated circuit (IC): a system-on-chip (SOC) device 100 including a programmable built-in self-test (pBIST) 130 .
[0017] SOC device 100 contains multiple modules that can be very complex to test. SOC 100 includes central processing unit (CPU...
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