Grid voltage bootstrapping xor/xnor circuit and grid voltage bootstrapping single-bit full adder

A gate voltage bootstrap and full adder technology, applied in the field of XOR circuit, can solve the problems of threshold voltage loss, power consumption-delay product, etc., to reduce leakage power consumption, improve performance, and increase operation speed effect

Active Publication Date: 2014-07-30
SHANDONG LANDBRIDGE PETROCHEMICAL CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Many scholars have proposed a variety of one-bit full adders using different logics (see A.M. Shams, T.K. Darwish and M.A. Bayoumi, “Performance analysis of low-power 1-bit CMOS full adder cells,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 10, 2002, pp 20-29.), although these one-bit full adders have certain effects, they also have obvious shortcomings. First, there is threshold voltage loss and non-full swing output; Second, the power consumption or power consumption-delay product is relatively large

Method used

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  • Grid voltage bootstrapping xor/xnor circuit and grid voltage bootstrapping single-bit full adder
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  • Grid voltage bootstrapping xor/xnor circuit and grid voltage bootstrapping single-bit full adder

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0025] Example 1: as Figure 9As shown, a gate voltage bootstrap XOR / OR circuit includes a gate voltage bootstrap XOR generation circuit and an inverter, and the gate voltage bootstrap XOR generation circuit includes a first PMOS tube, a second PMOS tube, a first PMOS tube, and a second PMOS tube. An NMOS tube, a second NMOS tube, a third NMOS tube and a fourth NMOS tube, the inverter includes a third PMOS tube and a fifth NMOS tube, the source of the first PMOS tube is connected to the positive pole of the external power supply, the first PMOS tube The drain of the tube is connected to the source of the second PMOS tube, the gate of the first PMOS tube is connected to the source of the first NMOS tube and the source of the third NMOS tube respectively, and the substrate of the second PMOS tube is connected to the external power supply The anode of the second PMOS tube is connected to the source of the second NMOS tube and the source of the fourth NMOS tube respectively, the d...

Embodiment 2

[0027] Embodiment 2: The rest is the same as Embodiment 1, the difference is the channel length of the first PMOS tube, the channel length of the second PMOS tube, the channel length of the third PMOS tube, and the channel length of the fourth PMOS tube. Channel length, channel length of the fifth PMOS transistor, channel length of the sixth PMOS transistor, channel length of the seventh PMOS transistor, channel length of the first NMOS transistor, channel length of the second NMOS transistor, third The channel length of the NMOS transistor, the channel length of the fourth NMOS transistor, the channel length of the fifth NMOS transistor, the channel length of the sixth NMOS transistor, the channel length of the seventh NMOS transistor, the channel length of the eighth NMOS transistor The length and the channel length of the ninth NMOS transistor under the PTM90nm standard process are both 90nm.

Embodiment 3

[0028] Embodiment 3: The rest is the same as Embodiment 1, the difference is the channel length of the first PMOS tube, the channel length of the second PMOS tube, the channel length of the third PMOS tube, and the channel length of the fourth PMOS tube. Channel length, channel length of the fifth PMOS transistor, channel length of the sixth PMOS transistor, channel length of the seventh PMOS transistor, channel length of the first NMOS transistor, channel length of the second NMOS transistor, third The channel length of the NMOS transistor, the channel length of the fourth NMOS transistor, the channel length of the fifth NMOS transistor, the channel length of the sixth NMOS transistor, the channel length of the seventh NMOS transistor, the channel length of the eighth NMOS transistor The length and the channel length of the ninth NMOS transistor under the PTM45nm standard process are both 50nm.

[0029] In order to compare the gate voltage bootstrap XOR / XOR circuit proposed i...

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Abstract

The invention discloses a grid voltage bootstrapping xor/xnor circuit and a grid voltage bootstrapping single-bit full adder composed of a summing signal generation circuit and a carry signal generation circuit together. The grid voltage bootstrapping xor/xnor circuit is characterized by comprising a grid voltage bootstrapping xnor generation circuit and a phase inverter, and the grid voltage bootstrapping xnor generation circuit is formed by a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor and a fourth NMOS transistor in a special connecting mode. The grid voltage bootstrapping xor/xnor circuit has the advantages that the xor/xnor circuit is connected to be of a grid voltage bootstrapping circuit structure, the grid bootstrapping effect is achieved, grid voltage of the third NMOS transistor or the fourth NMOS transistor is increased, then a high level successfully passes through the first NMOS transistor or the second NMOS transistor, full swing of circuit output is achieved, the capacity of driving the next stage is improved, the operating speed of the overall circuit is increased, leakage power dissipation of the circuit is reduced due to the full swing, the performance of the circuit is improved, and finally the time delay, power dissipation and the power dissipation-time delay product of the overall circuit are effectively reduced.

Description

technical field [0001] The present invention relates to an XOR circuit, in particular to a gate voltage bootstrap XOR / XOR circuit and a gate voltage bootstrap one-bit full adder. Background technique [0002] The XOR gate is one of the widely used gate circuits, and it often needs to be designed with low power consumption. [0003] As the basic operation unit of electronic system, full adder is widely used in many VLSI systems. For example, in high-performance microprocessors and DSP processors, the computing capability of one-bit full adder is very important. The one-bit full adder operation is often in the critical path of the high-performance processor system components, especially in the arithmetic logic unit, the operation performance of the one-bit full adder plays a very critical role in the performance of the processor. As microprocessors become faster and faster, so does the need for fast one-bit full adders. The performance of its speed, power consumption and are...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/20
Inventor 胡建平程伟
Owner SHANDONG LANDBRIDGE PETROCHEMICAL CO LTD
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