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Heterogeneous NAND type solid state disk and method for improving performance of heterogeneous NAND type solid state disk

A solid-state hard disk, heterogeneous technology, applied in the fields of data retention capability, heterogeneous NAND solid-state hard disk and improving its endurance life, can solve the problems of storage unit write resistance and data retention time decline, singleness, etc.

Active Publication Date: 2014-08-13
汇钜电科(东莞)实业有限公司
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0006] At present, a single process method is adopted for NAND solid-state hard disk products. For example, a NAND solid-state hard disk uses all SLC NAND memory chips, or all uses MLC NAND storage memory chips, or all adopts more advanced 3D stacking technology. The finished memory NAND chip has larger capacity and lower cost, but the write endurance and data retention time of the storage unit will be significantly reduced

Method used

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  • Heterogeneous NAND type solid state disk and method for improving performance of heterogeneous NAND type solid state disk

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Embodiment Construction

[0059] The present invention proposes a heterogeneous NAND type solid-state hard drive, which mainly includes: a storage logic controller and an N-level NAND memory chipset, the storage logic controller is connected to each level of the NAND memory chipset; The NAND memory chipset contains at least one NAND chip of the same type; wherein, N is a natural number greater than 1, and the number of bits that can be stored by the storage unit in each level of NAND memory chipset is higher than that of the previous one. The number of bits that can be stored in a memory cell in a super-NAND memory chipset is large. Its internal structure is as figure 2 As shown, the structure includes a storage logic controller and an N-level NAND memory chipset (N≥2). The storage logic controller controls operations such as reading, writing and erasing of N-level NAND storage units, as well as wear leveling control of storage units. Wherein each level of NAND memory chip set contains NAND chips of...

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Abstract

The invention provides a heterogeneous NAND type solid state disk and a method for improving the performance of the heterogeneous NAND type solid state disk. The heterogeneous NAND type solid state disk comprises an SLC (Single Layer Cell) NAND memory chip, further comprises an MLC (Multi Level Cell) NAND memory chip, and further comprises a 3D stack NAND memory chip, thereby being capable of integrating respective advantages and making up respective defects, and wider in application range. Meanwhile, the invention further provides a method for prolonging the endurance life of the heterogeneous NAND type solid state disk. The heterogeneous NAND type solid state disk is specifically adjusted according to service conditions of different parts in a memory, and a refresh cycle of a memory space in the memory can be periodically updated, thus erasing conditions of different regions in the memory can be more averagely distributed, further the service life of the memory is prolonged, and the storage capacity of a device to data is optimized.

Description

technical field [0001] The invention relates to the field of semiconductor devices, in particular to a heterogeneous NAND solid-state hard disk and a method for improving its endurance life and data retention capability. Background technique [0002] NAND solid-state drives have become the mainstream non-volatile storage technology and are widely used in various fields such as data centers, personal computers, mobile phones, smart terminals, and consumer electronics, and the demand is still growing. The manufacturing process of NAND solid-state drives has also been developed to 16nm, transforming from a two-dimensional manufacturing process to a three-dimensional manufacturing process. At present, the 128Gb 24-unit stacked three-dimensional NAND chip has been officially put into commercial production. The 16nm128Gb new two-dimensional NAND chip uses a new two-dimensional cell structure to break through the size reduction limit of the traditional two-dimensional structure. ...

Claims

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Application Information

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IPC IPC(8): G06F3/06G06F12/06G11C16/06
Inventor 景蔚亮陈邦明
Owner 汇钜电科(东莞)实业有限公司
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