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Adhesive composition and adhesive film for semiconductor and semiconductor device

An adhesive film, semiconductor technology, applied in the direction of film/sheet adhesive, non-polymer adhesive additives, adhesive types, etc., can solve the problems of inability to remove voids and inability to ensure fluidity Achieving good equipment identification, increased efficiency and productivity

Active Publication Date: 2014-12-17
CHEIL IND INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when applied to multi-layer stacks, these adhesive compositions cannot ensure sufficient fluidity through repeated heating and thus cannot effectively remove voids when molded.

Method used

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  • Adhesive composition and adhesive film for semiconductor and semiconductor device
  • Adhesive composition and adhesive film for semiconductor and semiconductor device
  • Adhesive composition and adhesive film for semiconductor and semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1 to 2

[0146] Examples 1 to 2: Preparation of Adhesive Compositions for Semiconductors

[0147] As listed in Table 1, add solvent (cyclohexanone) to thermoplastic resin, epoxy resin, phenol curing agent, amine curing agent, curing accelerator, filler and silane coupling agent so that the solid content in the solution is 20wt% , and then sufficiently kneaded these components with a bead mill, thereby preparing an adhesive composition for semiconductors.

Embodiment 1

[0164] Each adhesive composition prepared in Examples 1 and 2 and Comparative Examples 1, 2 and 3 was deposited onto a PET release film with a coater, and then dried in an oven at 100° C. for 10 to 30 minutes to provide Adhesive film with 5 μm thick adhesive layer. Furthermore, an adhesive film having an adhesive layer having a thickness of 10 μm and having the same components as in Example 1 was prepared in Example 3.

experiment example

[0165] Experimental Example: Evaluation of Physical Properties of Adhesive Compositions and Adhesive Films Prepared in Examples and Comparative Examples

[0166] The physical properties of each adhesive composition in Examples 1 to 3 and Comparative Examples 1, 2, and 3 or an adhesive film prepared using the same were evaluated by the following methods, and the results are shown in Table 2.

[0167] Table 2

[0168] project

condition

unit

Example 1

Example 2

Example 3

Comparative example 1

Comparative example 2

Comparative example 3

chip shear strength

260℃

Kgf / chip

2.5

2.4

2.8

3.0

0.6

2.5

Haze

%

28

25

33

24

25

11

Storage modulus after 1 cycle (A)

175℃

10 6 Dyne / cm 2

3.2

2.7

3.2

4.4

1.6

2.8

Storage modulus after 4 cycles (B)

175℃

10 6 Dyne / cm 2

4.4

4.3

4.4

8.2

3.2

4.5

...

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Abstract

The invention relates to an adhesive film and an adhesive composition for a semiconductor, and a semiconductor device connected via the adhesive film. The difference between an energy storage modulus (A) after four-time cycle and an energy storage modulus (B) after one-time cycle of the adhesive film is 3*100 dyne / cm<2>. The adhesive film is provided with the energy storage modulus (A) after four-time cycle with 7*106 dyne / cm<2> or smaller, and the energy storage modulus (B) after one-time cycle with 2*106 dyne / cm<2> or larger, and one-time cycle is defined as curing for one hour at the temperature of 125 DEG C and curing for 10 minutes at the temperature of 150 DEG C.

Description

technical field [0001] The present invention relates to an adhesive composition for semiconductors, an adhesive film comprising the composition, and a semiconductor device connected by the adhesive film. Background technique [0002] High capacity of semiconductor devices can be achieved in terms of mass by circuit integration, in which the number of cells per unit area is increased, or in terms of quantity, by packaging, in which chips are stacked one on top of the other. [0003] For such packaging technology, a multi-chip package (hereinafter "MCP") is generally used, which has a structure in which multiple chips are stacked one on top of the other via an adhesive, and the upper chip and the lower chip can be electrically bonded to each other by wire bonding. connect. [0004] In order to ensure sufficient bonding strength between the chip and the printed circuit board (PCB) in the chip bonding process, a PCB baking process and a PCB plasma process are performed. In add...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): C09J133/14C09J11/06C09J7/02C09J163/02C09J11/04
Inventor 魏京台崔裁源金成旻金振万金惠珍李俊雨
Owner CHEIL IND INC