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Transistor and formation method thereof

A technology of transistors and crystal orientations, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as leakage currents, achieve performance assurance, reduce interference, and suppress leakage currents

Active Publication Date: 2014-12-17
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] However, the transistor with the stress layer formed in the prior art is still prone to leakage current

Method used

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  • Transistor and formation method thereof
  • Transistor and formation method thereof
  • Transistor and formation method thereof

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Experimental program
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Effect test

Embodiment Construction

[0037] As mentioned in the background art, leakage current is easily generated in the transistor with the stress layer formed in the prior art.

[0038] The inventors of the present invention found that with the improvement of chip integration and the reduction of the size of the transistor, the size of the source region, the drain region and the channel region of the transistor are also reduced accordingly, so that the diffusion of dopant ions in the source region and the drain region The phenomenon is more obvious; when ion diffusion occurs at the bottom of the source region and the drain region, leakage current is easily generated between the bottom of the source region and the drain region. Please continue to refer image 3 , there are dopant ions in the stress layer 13 to form a source region and a drain region, wherein, once the dopant ions near the bottom of the stress layer 13 are diffused, a leakage current can be generated; moreover, the bottom of the stress layer 13...

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PUM

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Abstract

Disclosed are a transistor and a formation method thereof. The transistor comprises a substrate, openings, first stress layers, dielectric layers and second stress layers. The substrate comprises an insulating layer and a semiconductor layer located on the surface of the insulating layer, and the surface of the semiconductor layer is provided with multiple gate structures; the openings of the semiconductor layer are located between the every two neighboring gate structures and exposed out of the insulating layer; the first stress layers are located on the surfaces of the side walls of the openings; the dielectric layers are located in the openings with the surfaces of the side walls provided with the first stress layers, and the surfaces of the dielectric layers are lower than the surface of the semiconductor layer; the second stress layers are located on the first stress layers and the surfaces of the dielectric layers, and the openings are filled with the second stress layers. By the transistor and the formation method thereof, leakage current of the transistor is reduced, and performance is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a transistor and a forming method thereof. Background technique [0002] As the most basic semiconductor device, transistors are currently being widely used. With the increase of component density and integration of semiconductor devices, the gate size of transistors has become shorter than before; however, the shortened gate size of transistors will make transistors The short channel effect is generated, and then leakage current is generated, which finally affects the electrical performance of the semiconductor device. At present, in the prior art, the stress of the channel region of the transistor is mainly increased to increase the carrier mobility, thereby increasing the driving current of the transistor and reducing the leakage current in the transistor. [0003] In the prior art, the method for increasing the stress of the channel region of the transist...

Claims

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Application Information

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IPC IPC(8): H01L21/336H01L29/06
CPCH01L29/0653H01L29/66553H01L29/7848
Inventor 洪中山
Owner SEMICON MFG INT (SHANGHAI) CORP
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