High-speed low-imbalance dynamic comparator for high-speed analog-digital converter

Abstract

The invention provides a high-speed low-imbalance dynamic comparator for a high-speed analog-digital converter. The high-speed low-imbalance dynamic comparator comprises a pre-amplifier, a dynamic amplifier and a dynamic latch. The pre-amplifier comprises a static amplifier, a first input imbalance storage capacitor and a second input imbalance storage capacitor. The first input imbalance storage capacitor and the second input imbalance storage capacitor are connected to a positive phase input end of the static amplifier and the negative phase input end of the static amplifier in series respectively so as to store the offset voltage of the static amplifier in the imbalance and elimination stage; the dynamic amplifier is used for amplifying the output signals of the pre-amplifier; the dynamic latch is used for amplifying the output signals of the dynamic amplifier and converting the amplified signals into a digital logic level. According to the high-speed low-imbalance dynamic comparator, the imbalance elimination technology is adopted for the pre-amplifier, the bandwidth of the pre-amplifier is optimized through an active resistor, the imbalance voltage can be reduced effectively while the high speed is guaranteed, and the dynamic amplifier which is low in power dissipation is adopted, so that power dissipation can be reduced.

Description

technical field [0001] The invention relates to a dynamic comparator, in particular to a high-speed low-offset dynamic comparator used for a high-speed analog-to-digital converter. Background technique [0002] The comparator is an important constituent unit of the pipeline A / D (analog / digital) converter, and its performance has an important influence on the pipeline A / D converter. With the development of the pipeline A / D converter towards high speed and high precision, the requirements for its internal sub-circuits, especially the comparator, are getting higher and higher. In the MDAC (multiplicative digital-to-analog converter) of the pipeline A / D converter, multiple internal comparators need to convert the input analog voltage signal of this stage into the logic level required by the subsequent circuit, and then through the D / A (digital / A) The converter converts the logic level signal into an analog voltage signal, and finally performs a subtraction operation to obtain ...

AI Technical Summary

Problems solved by technology

There are at least the following problems in the prior art: the general preamplified latch comparator only pays attention to reducing the kickback noise of the latch, but does not pay attention to the offset of the preamplifier, which

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