A three-dimensional semiconductor storage device based on deep hole filling and its preparation method

Abstract

The invention discloses a three-dimensional semiconductor storage device based on deep hole filling and a preparation method thereof. This preparation method is suitable for preparing U-shaped channels of three-dimensional semiconductor memories: using dual ion beam deposition technology, a beam of ions bombards the target material, causing the material atoms to overflow, and the atoms are deposited into the deep hole along the trajectory, and a beam of ions bombards the deep hole The surface prevents the deposited material from covering the top of the deep hole, thereby ensuring the complete formation of the U-shaped channel of the three-dimensional semiconductor storage device. The electrodes of the U-shaped channel semiconductor storage device are drawn from the top of the device, which reduces the contact area of ​​the electrode. At the same time, the NAND string of the U-shaped semiconductor storage device can include a stacked structure in which at least one layer of semiconductor and one layer of insulating layer are alternately stacked. The number of devices per unit area is increased, so the U-shaped channel semiconductor memory can greatly increase the storage density.

Description

technical field [0001] The invention belongs to the technical field of microelectronic devices and memory, and more specifically relates to a three-dimensional semiconductor memory based on deep hole filling and a preparation method thereof. Background technique [0002] Although polysilicon floating-gate non-volatile memory (NVM) arrays have achieved great success using 20nm (or less) semiconductor fabrication technology, further scaling has become very difficult. There are several reasons for this: crosstalk from adjacent cells and a small amount of programmable electrons in the floating gate. This limitation complicates multi-level storage with floating gates. Therefore, the development of three-dimensional memory devices is imperative. [0003] Especially in the field of embedded memory, three-dimensional back-end (B / E) nonvolatile memory arrays are also challenging because this approach allows for larger nonvolatile arrays. The use of large-capacity (>1Gbit) embed...

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Problems solved by technology

[0004] However, further studies have shown that the above-mentioned existing solutions still have the following technical problems: in order to prepare three-dimensional memory devices with a large number of devices in the vertical direction and a small area of ​​a single device, deep holes with high aspect ratio are often required in the preparation process, but are subject to Due to the limitations of the current deposition process, the deposition of deep holes is often uneven in the upper and lower parts, and because the upper part of the deep holes is easily covered by deposited materials during the deposition process, which hinders the continued deposition of the deep holes, affecting the stability of the device and production yield.

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