Current-mirror-mode reading circuit of non-refrigeration infrared detector
An uncooled infrared, readout circuit technology, applied in the direction of electrical radiation detectors, etc., to ensure repeatability, expand the scope of application, and improve nonlinear performance.
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Embodiment approach 1
[0020] This invention uses the input terminal as a current mirror to design the uncooled infrared detector line column readout circuit, and its unit structure diagram is as follows figure 1 As shown, Vbias is the voltage applied to the uncooled detector (Bolo), which can be adjusted appropriately according to the resistance of the uncooled detector. When the resistance of the uncooled detector is 50KΩ, Vbias can be set to 5V , when the resistance of the uncooled detector is less than 20KΩ, Vbias can be lowered according to the situation, but the minimum can not be less than 3V, otherwise the voltage at the input terminal of the differential amplifier will be too low to make the circuit work normally; on the contrary, but the resistance of the uncooled detector is greater than When 100KΩ, Vbias can be adjusted higher according to the situation, but the maximum cannot exceed 7V, otherwise it will affect the reliability and life of the circuit and other performance. ref is the in...
Embodiment approach 2
[0021] The circuit adopts the current mirror mode at the input end, and the circuit structure of the current mirror mode is as follows figure 2 As shown, since the width-to-length ratio of NM4 is 10 times that of NM5, NM5 and NM1 constitute the input stage current mirror for coarse adjustment control, NM4 and NM2 constitute the input stage current mirror for fine adjustment control, and va and vb are coarse adjustment and fine adjustment respectively. external port. res is an integral switch, it is in the integral state when the level is high, and it is in the off state when the level is low, and the drain (upper end) of NM3 is connected to the uncooled infrared detector. When drawing the layout, the current mirror is arranged at the left and right ends of the column circuit, and the ground wire adopts a metal wire with a width greater than 100 microns. The non-linearity of the line array 160 circuit designed by this method is less than 1%.
[0022] The tube reference size ...
Embodiment approach 3
[0025] The circuit uses a differential input CTIA circuit structure such as image 3 As shown, the integral capacitor is composed of three capacitors, C1, C2, and C3, whose sizes are 10pF, 20pF, and 20pF respectively. C1 is the reference capacitor, and C2 and C3 are controlled by select1 and select2 respectively. Different combinations form different magnifications. The circuit can adapt to the requirements of different response rates of uncooled detectors. When both select1 and select2 are high, the total integral capacitance is 50pF, which is suitable for reading signals with high response rate; when select1 and select2 are both low, the total integral capacitance is 10pF, which is suitable for reading signals with low response rate out. The amplifier adopts a differential amplifier, the in and out terminals are connected with an integrating capacitor, and the other input terminal of the differential input is a reference voltage terminal ref.
[0026] The CMOS differential...
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Abstract
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