Supercharge Your Innovation With Domain-Expert AI Agents!

RRAM cell structure for beva/teva with lateral offset

A lateral offset, resistive random technology, applied in electrical components, semiconductor devices, circuits, etc., can solve problems such as high contact resistance change rate

Active Publication Date: 2017-12-05
TAIWAN SEMICON MFG CO LTD
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, conventional RRAM cells are capable of inducing a high rate of change in contact resistance at the top electrode via

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • RRAM cell structure for beva/teva with lateral offset
  • RRAM cell structure for beva/teva with lateral offset
  • RRAM cell structure for beva/teva with lateral offset

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0044] The description herein is made with reference to the drawings, wherein like reference numerals are generally used to refer to like elements throughout and the different structures are not necessarily drawn to scale. In the following description, for the purpose of illustration, numerous specific explanations are given for understanding. However, it will be apparent to those skilled in the art that one or more aspects herein may be practiced with a lesser degree of this detailed description. In other instances, well-known structures and devices are shown in block diagram form to facilitate understanding.

[0045]An RRAM cell includes two electrodes with a resistive switching element disposed between the two electrodes. The resistive switching element or variable resistive dielectric layer is prepared using a "forming process" to prepare the memory device for use. Typically the forming process is applied in a factory, assembly or initial system configuration. Resistive...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The present invention relates to a resistive random access memory (RRAM) cell architecture with axially or laterally offset top via (TEVA) and bottom via (BEVA). Conventional RRAM cells with coaxial TEVA and BEVA can induce a high contact resistance change rate. The axis-offset TEVA and BEVA in the present invention pushes the TEVA away from the insulating layer above the RRAM cell, which can improve the contact resistance change rate. The present invention also relates to a memory device having a rectangular RRAM cell with a larger area enabling lower formation voltage and improved data retention. The invention also discloses a BEVA / TEVA RRAM unit structure with lateral offset.

Description

technical field [0001] The present invention relates to the field of semiconductor technology, and more particularly, relates to a BEVA / TEVA RRAM cell structure with lateral offset. Background technique [0002] Nonvolatile memory is used in a wide variety of commercial and military electronics and equipment. Embedded flash memory devices are used to store data and executable programs in integrated chips. As the functionality of integrated chips increases, so does the need for greater memory capacity, forcing integrated chip designers and manufacturers to increase the available memory capacity while reducing the size and power consumption of the integrated chip. To achieve this goal, the size of memory cell components has been significantly reduced over the past few decades. Integrating floating gates and high-k metal gates becomes complex and expensive for embedded flash memory storage due to process technology shifts to smaller cell sizes. Resistive Random Access Memory...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L45/00
CPCH10B63/30H10N70/20H10N70/826H10N70/8833H10N70/063H10B53/30H10N70/8265H10N70/011H10N70/24H10N70/066H10N70/841H10N70/021H10N70/023H10N70/25H10N70/026H10N70/028H10N70/041H10N70/043H10N70/046H10N70/061H10N70/068H10N70/231H10N70/235H10N70/245H10N70/253H10N70/257H10N70/801H10N70/821H10N70/823H10N70/828H10N70/881H10N70/882H10N70/883H10N70/884H10N70/8413H10N70/8416H10N70/8418H10N70/8613H10N70/8616H10N70/8822H10N70/8825H10N70/8828H10N70/8836H10N70/8845
Inventor 张至扬朱文定涂国基廖鈺文陈侠威杨晋杰石昇弘游文俊
Owner TAIWAN SEMICON MFG CO LTD
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com