GigE (gigabit Ethernet) vision protocol-based Ethernet controller IP (Internet protocol) core and method

A technology of Ethernet and controller, which is applied in the direction of data exchange network, architecture with a single central processing unit, general-purpose stored program computer, etc. It can solve the problems of high CPU usage, large resource occupation, and low image acquisition efficiency. Achieve the effect of reducing CPU usage, reducing burden, and reducing development difficulty

Active Publication Date: 2015-04-29
SOUTHEAST UNIV
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  • Abstract
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  • Application Information

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Problems solved by technology

[0016] In order to overcome the shortcomings of traditional Ethernet controllers such as large resource occupation, high CPU usage, and low image acquisition efficie

Method used

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  • GigE (gigabit Ethernet) vision protocol-based Ethernet controller IP (Internet protocol) core and method
  • GigE (gigabit Ethernet) vision protocol-based Ethernet controller IP (Internet protocol) core and method
  • GigE (gigabit Ethernet) vision protocol-based Ethernet controller IP (Internet protocol) core and method

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Embodiment Construction

[0061] refer to figure 1 , an Ethernet controller IP core based on the GigE Vision protocol is implemented using an FPGA system. The main hardware used in the implementation includes FPGA modules, EPCS management modules, power management modules, SSRAM, PHY chips and their modules, and GigE cameras. The specific chip is:

[0062] [1] The FPGA adopted by the implementation system adopts the EP2S60F672C3N chip of the Stratix II series of Altera Company;

[0063] [2] The SSRAM adopted by the implementation system is the CY7C1380D chip of Cypress Company;

[0064] [3] The PHY chip used in the implementation system is the 88E1111 chip of Marvell;

[0065] [4] The GigE camera used in the implementation system is the acA640-90gc camera of Basler Company.

[0066] refer to figure 2 , the IP module adopted in the implementation case on the FPGA includes a NIOS II microprocessor, an external RAM module interface, an image storage module, an Ethernet controller IP core based on the...

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Abstract

The invention discloses a GigE vision protocol-based Ethernet controller IP core. The GigE vision protocol-based Ethernet controller IP core is composed of a control module, a PHY (physical layer) management interface module, a transmission control module, a flow control module and a receiving control module and implemented through FPGAs (field programmable gate array) and follows the Avalon Memory-Mapped interface specifications and the GMII (gigabit media independent interface) specifications. The GigE vision protocol-based Ethernet controller IP core is a special IP core designed according to the characteristics of the GigE Vision protocol and can achieve GigE camera image receiving and automatic storage; the GigE vision protocol-based Ethernet controller IP core achieves image collection and meanwhile overcomes the shortcomings of large resource occupation, high CPU (central processing unit) utilization rate, low image collecting efficiency and the like of traditional Ethernet controllers; by means of the characteristics of parallel processing of the FPGAs, the data receiving speed and the system timeliness can be improved. Under the same testing conditions, collecting images through the GigE vision protocol-based Ethernet controller IP core can reduce more than a half of FPGA resource consumption compared with a triple-speed Ethernet core of the Altera Company.

Description

technical field [0001] The invention relates to an image acquisition system, in particular to a Gigabit Ethernet control unit in an embedded image acquisition system based on the Gigabit Ethernet Vision (GigE Vision) protocol. Background technique [0002] At present, image acquisition equipment is mainly divided into two directions, one is an image acquisition card based on a personal computer (PC), and the other is an image acquisition system based on an embedded microprocessor. [0003] Due to the low bandwidth of the peripheral component interconnect (PCI) bus interface and the use of a shared bus structure, image acquisition card products based on the PCI bus have basically been eliminated. Although the performance of the new-generation PCI Express bus has been greatly improved compared with the traditional PCI bus, it still cannot solve the problems of poor real-time performance, poor stability and high cost of the PC system. Therefore, PC-based image acquisition card ...

Claims

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Application Information

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IPC IPC(8): G06F15/78H04L12/801
Inventor 叶莉华姚克奇杭建军涂平平彭佩红薛扣粉崔一平
Owner SOUTHEAST UNIV
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