Semiconductor encapsulation structure and forming method thereof

Abstract

The invention provides a semiconductor encapsulation structure and a forming method thereof. The semiconductor encapsulation structure comprises a plurality of semiconductor chips, a sealing material layer, a through hole interconnecting structure, a first rewiring layer, a first lug, a second rewiring layer and a second lug, wherein bonding pads are arranged on the surfaces of the semiconductor chips; the sealing material layer is used for sealing the plurality of semiconductor chips, and the bonding pads on the surfaces of the semiconductor chips are exposed from the frontage of the sealing material layer; the through hole interconnecting structure is located in the sealing material layer between the adjacent semiconductor chips and penetrates through the thickness of the sealing material layer; the first rewiring layer is located on the frontage of the sealing material layer and connected with the bonding pads and the top surface of the through hole interconnecting structure; the first lug is located on the first rewiring layer; the second rewiring layer is located on the back of the sealing material layer and connected with the bottom surface of the through hole interconnecting structure; the second lug is located on the second rewiring layer. The semiconductor encapsulation structure is small in volume and high in integrity.

Description

technical field [0001] The invention relates to the packaging field, in particular to a semiconductor packaging structure and a forming method thereof. Background technique [0002] Today, with the rapid development of information technology, the market prospect of integrated circuits is getting wider and wider. Correspondingly, the industries of integrated circuit design, chip manufacturing and integrated circuit packaging are all developing rapidly. In my country, the IC packaging industry has become an important economic growth point of the IC industry. In order to meet the needs of high-speed processing, multi-function, integration, miniaturization and low price of integrated circuit components, integrated circuit packaging technology also needs to be developed towards miniaturization and high density. Currently commonly used IC packaging technologies include Ball Grid Array (BGA), Chip-Scale Package (CSP) and Multi-Chip Module (MCM). In the packaging technology of int...

AI Technical Summary

Problems solved by technology

[0004] However, the existing chip packaging structure occupies a large volume and low integration

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