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Method and device for highly precisely measuring single-channel signal pulse width through FPGA

A measurement method and technology of a measurement device are applied in the field of high-precision measurement of single-channel signal pulse width, which can solve the problems of reducing time measurement integration, increasing implementation cost, waste of electronic channels, etc., and achieving universality and ease of use. , low cost and simple structure

Active Publication Date: 2015-11-18
UNIV OF SCI & TECH OF CHINA
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Problems solved by technology

However, this method requires twice the resource consumption to obtain signal pulse width information
In applications where only the leading edge of the signal is measured, the other half of the electronics channel for trailing edge measurements is completely wasted
In the occasions where the number of time measurement channels is high, this obviously greatly reduces the integration of time measurement and increases the implementation cost

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  • Method and device for highly precisely measuring single-channel signal pulse width through FPGA
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  • Method and device for highly precisely measuring single-channel signal pulse width through FPGA

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Embodiment Construction

[0022] The present invention proposes a method for measuring the pulse width of a single-channel high-precision signal in an FPGA. The basic idea is to simultaneously measure the time of the leading edge and the trailing edge of the signal on a single electronic channel. Modern FPGA-based time measurement techniques often use time interpolation in order to improve accuracy. Due to the characteristics of FPGA internal resources, the carry chain at the bottom of the chip is used as the basic unit of the interpolation delay chain. Therefore, to perform high-precision measurement of the signal pulse width on a single channel, the first thing to be solved is the construction of the delay chain.

[0023] figure 1 It shows the internal specific structure of the slice resource in XilinxVirtex-5 and later series FPGAs. Inside the dashed box is the CARRY4 primitive module containing the carry chain. It is divided into 4 bits (CO0~CO3, O0~O3), each bit contains a multiplexer (MUX) and an e...

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Abstract

The invention discloses a method and device for highly precisely measuring the single-channel signal pulse width through an FPGA. A delay chain is formed by at least one carry line resource in the FPGA, each carry line resource is provided with a plurality of taps, one part of taps output the state information, on the delay chain, of rising edges of measuring signals, and the other part of taps output the state information, on the delay chain, of falling edges of the measuring signals; the state information of the rising edges and the state information of the falling edges are selected through a multiplexer and input to a decoding unit to be decoded. The method and device have the advantages of being high in measurement precision, low in resource consumption and high in universality.

Description

Technical field [0001] The invention belongs to the technical fields of data acquisition, high-precision time measurement and the like, and specifically relates to a method and device for high-precision measurement of single-channel signal pulse width realized by FPGA, which can be applied to particle physics experiments, nuclear physics experiments and the like. Background technique [0002] Time measurement has extremely wide applications in scientific research, industrial applications, communications, military and other fields. For example, the lifetime of the excited state of an atom is expressed as the time interval between two consecutive signals; the energy of a neutron is expressed as the flight required for a neutron to fly over a certain distance. Time; the spatial position of the particle incident can be expressed as the time information of the output signal of the position-sensitive detector; the time and position of the incident particle are often processed by the tim...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G04F10/04
Inventor 曹平范欢欢安琪刘树彬
Owner UNIV OF SCI & TECH OF CHINA
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