Mask plate, fabrication method thereof and exposure system

Abstract

The invention provides a mask plate, a fabrication method thereof and an exposure system. The mask plate comprises a first region and a second region, wherein a plurality of patterning masks are arranged in both of the first region and the second region, and the distribution density of the plurality of patterning masks in the first region is smaller than the distribution density of the plurality of patterning masks in the second region; and each patterning mask comprises a first pattern, a second pattern and a slit between the two patterns, and the slit width in the first region is greater than the slit width in the second region. By the mask plate, the intensity of the exposure light ray penetrating through the slit in the second region is reduced relative to the intensity of the exposure light ray penetrating through the slit in the first region, thus, the thickness of a photoresist reserved on an active region film layer tends to consistency after transistors in a display region and a non-display region are exposed and developed through a source and a drain, an active region of the transistor in the non-display region after being subjected to an etching process is further ensured not to be broken, and finally, the transistor in the non-display region can be ensured to normally work.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to a mask plate, a preparation method thereof, and an exposure system. Background technique [0002] In a thin film transistor liquid crystal display (TFT-LCD), the thin film transistor plays a very important role as a switching device of a digital circuit. [0003] At present, in the production of TFT-LCD array substrates, a single-slit diffraction mask (SingleSlitMask), a gray-tone mask (GrayToneMask) or a half-tone mask (HalfToneMask) is generally used for the source-drain metal layer mask (SDMask) process. When a single-slit diffraction mask is used for the source-drain metal layer masking process, the source-drain channel region is exposed through slit diffraction. Since the source-drain channel itself is relatively narrow, if the light intensity of the exposure light is too low after diffracting through the slit and the exposure is insufficient, it is easy to cause t...

AI Technical Summary

Problems solved by technology

[0004] On the TFT-LCD array substrate, such as figure 1 As shown, since the distribution density of thin film transistors in the non-display area 5 (such as the peripheral wiring area) is much higher than that of the display area 6 (ie, the pixel area), so in the process of developing after exposure, the non-display area 5 has a negative impact on the development per unit time. The consumption of the liquid is much lower than that in the display area 6, which makes the concentration of the developer in the local area in the non-display area 5 higher than that in the display area 6, so that the photolithography of the channel area of ​​the thin film transistor in the non-display area 5 is easily caused after the development is completed. The glue is too thin, and after the etching process, it is easy to cause the source-drain channel semiconductor to be missing, so that the source-drain channel is disconnected, so that the thin-film transistors in the non-display area 5 of the TFT-LCD cannot work, and eventually the display area 6 cannot be used. normal display

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