Ultrasonic imaging method based on ZYNQ FPGAs

An ultrasonic imaging method and a series of technologies, which are applied in the directions of ultrasonic/sonic/infrasonic image/data processing, ultrasonic/sonic/infrasonic equipment control, ultrasonic/sonic/infrasonic diagnosis, etc., which can solve complex hardware circuits and difficult design , Ultrasound imaging equipment is bulky and bulky, etc., to achieve the effect of abundant resources, reducing development difficulty, and realizing software and hardware collaborative design

Active Publication Date: 2016-05-04
HARBIN INST OF TECH
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  • Abstract
  • Description
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  • Application Information

AI Technical Summary

Problems solved by technology

[0007] In order to solve the problems of bulky and bulky ultrasonic imaging equipment, complex hardware circuits, and difficult design, the present invention provides an ultrasonic imaging method based on ZYNQ series FPGA

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  • Ultrasonic imaging method based on ZYNQ FPGAs
  • Ultrasonic imaging method based on ZYNQ FPGAs
  • Ultrasonic imaging method based on ZYNQ FPGAs

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Embodiment Construction

[0023] The technical solution of the present invention will be further described below in conjunction with the accompanying drawings, but it is not limited thereto. Any modification or equivalent replacement of the technical solution of the present invention without departing from the spirit and scope of the technical solution of the present invention should be covered by the present invention. within the scope of protection.

[0024] ZYNQ series FPGA is mainly used in the following three aspects: ultrasonic signal transmission, ultrasonic echo signal processing and ultrasonic image transmission, combined below figure 1 The present invention is described in further detail, and the specific implementation steps of the present invention are as follows:

[0025] Execute step 1: control the emission of the ultrasound probe, mainly including sequence control, dynamic focusing and dynamic apodization, and generate data required for ultrasound imaging.

[0026] (1a) In order to obta...

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Abstract

The invention discloses an ultrasonic imaging method based on ZYNQ FPGAs. The method specifically comprises the steps of 1, designing ultrasonic signal transmission control and signal receiving programs by means of Vivado HLS software built in ZYNQ FPGAs to control an ultrasonic transceiver chip and acquire data required by ultrasonic imaging; 2, processing received ultrasonic echo signals through the Vivado HLS software by means of the PL part in ZYNQ; 3, optimizing a processed ultrasonic echo image and transmitting the processed image to the rear end through SDK software by means of the PS part in ZYNQ. By the adoption of the method, the whole process of ultrasonic imaging is realized in ZYNQ, the integration level of control chips is effectively increased, and the size of ultrasonic imaging equipment is reduced; meanwhile, by means of the Vivado HLS software and the SDK software, research and development efficiency is effectively improved, development difficulty is reduced, the transportability of the method is improved, and the method is quite suitable for small products such as portable wireless ultrasonic imaging equipment.

Description

technical field [0001] The invention belongs to the field of medical ultrasonic imaging, and relates to an ultrasonic imaging method based on a highly integrated control chip. Background technique [0002] Ultrasound imaging technology has the advantages of no radiation, clear and intuitive imaging, etc., and plays an important role in many medical fields. Its main working mode is to control the ultrasonic transceiver chip to transmit ultrasonic signals through FPGA, and receive and preprocess the returned signals. Use ARM to perform in-depth processing, imaging and optimization on the preprocessed data. [0003] Traditional ultrasound equipment is bulky and heavy. This is because most devices separate the FPGA from the ARM chip, the FPGA part uses chips from Altera or Xilinx, and the ARM part is equipped with a GPU to improve the overall operating speed. Due to too many chips in such a device, it is difficult to design hardware, and the size and power consumption of the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): A61B8/00
CPCA61B8/00A61B8/52A61B8/54A61B2560/0443
Inventor 沈毅崔一鸣章欣郭威张淼
Owner HARBIN INST OF TECH
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