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Binary capacitor array applied to near-threshold SARADC and switching method with low power consumption thereof

A capacitor array, binary technology, applied in the direction of electrical components, electrical signal transmission systems, signal transmission systems, etc., can solve the problems of difficult to do the third level, not worth the loss, etc.

Active Publication Date: 2016-05-04
SOUTHEAST UNIV
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

Moreover, in the design of near-threshold SARADC, the third level is very difficult to do, so the introduction of the third level seems to outweigh the gain.

Method used

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  • Binary capacitor array applied to near-threshold SARADC and switching method with low power consumption thereof
  • Binary capacitor array applied to near-threshold SARADC and switching method with low power consumption thereof
  • Binary capacitor array applied to near-threshold SARADC and switching method with low power consumption thereof

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Embodiment Construction

[0059] The present invention will be further described below in conjunction with the accompanying drawings.

[0060] The invention provides a low-power capacitive switching algorithm applied to a near-threshold SARADC, and it is hoped that the power consumption of the capacitive DAC in the conversion process is as small as possible. figure 2 Based on the structure diagram of the 5bitSARADC capacitor array of the present invention, the working process of the proposed low-power switching algorithm is further described in conjunction with the capacitor array.

[0061] figure 1 It is a capacitor array diagram of NbitSARADC. It can be seen from the figure that for an N-bit SARADC, the entire capacitor array is divided into two capacitor arrays with equal positive and negative ends, and each capacitor array includes a highest-order capacitor C N-3 , N-4 high-level capacitors, and one lowest-level capacitor C u and a dummy capacitor C D , except for the highest bit capacitance C...

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Abstract

The invention discloses a binary capacitor array applied to a near-threshold SARADC and a switching method with low power consumption thereof. By means of special construction of a core module thereof, namely a DAC capacitor array, the power consumption of the DAC part in the conversion process of the SARADC can be greatly reduced in combination with a provided new switching algorithm. Only two reference levels are adopted in the algorithm, such that the algorithm is applied to designing the SARADC under near-threshold voltage. Compared with the area of the capacitor array required by the ordinary two-level capacitor switching technology, by means of flexible application of united, split and floating capacitor switching technologies, the total area of the capacitor array is reduced by 50%.

Description

technical field [0001] The invention relates to a binary capacitance array applied to a near-threshold SARADC and a low-power switching method thereof, belonging to the capacitance-type DAC technology of the SARADC. Background technique [0002] Low-voltage, low-power analog-to-digital converters are essential components in applications such as mobile devices, handheld medical diagnostic equipment, and wireless sensors. These applications are limited in size and runtime by the batteries that power them. One of the outstanding advantages of SARADC compared with other ADCs is low power consumption, especially at low voltage or even near threshold voltage, the power consumption can be made lower. Capacitive DAC is one of the most important modules in SARADC, and its power consumption in conversion engineering occupies a large proportion of the entire SARADC power consumption. In recent years, many studies have focused on reducing the power consumption of this part. By optimi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/46
CPCH03M1/466
Inventor 吴建辉吴爱东杜媛陈超李红张萌
Owner SOUTHEAST UNIV
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