Insulated Gate Bipolar Transistor Manufacturing Method
A technology of bipolar transistors and manufacturing methods, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as difficult manufacturing, and achieve the effect of low on-state voltage drop
Active Publication Date: 2018-09-07
宁波安建半导体有限公司
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However, mesas with a width of about 20 nm in device 100 are actually very difficult to fabricate
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[0041] This embodiment is a preferred implementation mode of the present invention, and other principles and basic structures that are the same or similar to this embodiment are within the protection scope of the present invention.
[0042] The present invention will be described using n-channel devices, but it will be understood in the following description that the present invention is also applicable to p-channel devices, and the structure of p-channel devices is similar to that of n-channel devices, except that the doped regions The miscellaneous type is just the opposite, which is recognized in the industry, so the present invention only uses the N-channel as an example to illustrate the structure, and omits the structure description for the p-channel device.
[0043] The present invention mainly protects a manufacturing method of an insulated gate bipolar transistor, and the manufacturing method includes the following steps:
[0044] (1) Start with a lightly doped substr...
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Abstract
The invention discloses a manufacturing method of an insulated gate bipolar transistor. The manufacturing method includes the following steps that 1, a lightly-doped substrate wafer is manufactured; 2, a dielectric layer is formed on the wafer; 3, an un-doped polycrystalline silicon layer is deposited on the dielectric layer; 4, patterning is carried out on the un-doped polycrystalline silicon layer and the dielectric layer to form a gate electrode trench; 5, silicon is deposited to form monocrystalline silicon on the monocrystalline silicon surface and form polycrystalline silicon on the rest part of the wafer surface; 6, a gate dielectric is formed; 7, a gate electrode is formed; 8, a polycrystalline silicon base region is formed; 9, a heavily-doped polycrystalline silicon emitting region and a heavily-doped polycrystalline silicon diffusion region are formed; 10, an interlayer dielectric is deposited; 11, patterning is carried out on the interlayer dielectric; 12, an emitting electrode is formed; 13, the wafer is thinned to form a drift region; 14, a buffer region is formed on the back side through ion implantation and annealing; 15, a collecting region is formed on the back side; 16, a collecting electrode is formed on the back side. By means of the manufacturing method, a device can have the theoretical minimum on-state voltage drop.
Description
technical field [0001] The invention discloses a method for manufacturing a power semiconductor device, in particular a method for manufacturing an insulated gate bipolar transistor. Background technique [0002] Insulated-gate bipolar transistors (IGBTs) have been widely used in high-voltage power electronic systems, such as variable-frequency drives and inverters. An ideal device should have low power loss. The conduction loss of IGBT is the main component of power loss, and the conduction loss can be characterized by the on-state voltage of the device. [0003] Please refer to the attached picture, figure 1 A cross section of a prior art IGBT device 100 is shown in . Device 100 is a PNP bipolar junction transistor controlled by MOS, and the MOS channel is controlled by n + Emitter region 111, p base region 113, n - The drift region 114, the gate dielectric 132 and the gate electrode 122 are composed, and the on-state and off-state of the device are controlled by the M...
Claims
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IPC IPC(8): H01L21/331
CPCH01L29/66325
Inventor 周贤达舒小平徐远梅
Owner 宁波安建半导体有限公司