Defect reduction with rotated double aspect ratio trapping

Abstract

A structure and method for fabricating a heteroepitaxially grown lattice-mismatched semiconductor layer with a lower defect density is disclosed. A first semiconductor layer is epitaxially grown on an upper surface of a lattice mismatched crystalline substrate in a lower trench using a first ART deposition process. The structure is then rotated 90 degrees along a horizontal plane and a second semiconductor layer is epitaxially grown on an upper surface of the first semiconductor layer in an upper trench using a second ART deposition process. This results in an upper portion of the second semiconductor layer being substantially free of epitaxy defects.

Description

technical field [0001] Embodiments of the present invention relate generally to semiconductor devices, and more particularly to structures and methods for reducing defect density in heteroepitaxially grown materials on semiconductor substrates using a rotational dual aspect ratio trapping (ART) process. Background technique [0002] In advanced complementary metal-oxide-semiconductor (CMOS) technologies, heteroepitaxial growth of lattice-mismatched layers (i.e., germanium on silicon, III-V compounds on silicon, III-V compounds on germanium) ( heteroepitaxial growth) has practical application. However, integrating germanium or III-V compounds into conventional substrates made of silicon and / or other crystalline dielectric materials using conventional fabrication methods is challenging because of the differences in the crystalline lattice structures of the two materials. Mismatch between the two can lead to high defect formation in the resulting epitaxial structure. Lattice ...

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Problems solved by technology

However, even with the ART procedure, a considerable number of defects may propagate to the epitaxial surface parallel to the trench direction, where these defects affect the quality of the epitaxially grown crystalline structure

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