Array substrate, preparation method of array substrate and display device

Abstract

The embodiment of the invention provides an array substrate, a preparation method of the array substrate and a display device and relates to the technical field of display. The grain size and homogeneity can be improved. The array substrate comprises a substrate and a polycrystalline silicon thin film transistor arranged on the substrate. The polycrystalline silicon thin film transistor comprises an active layer. The active layer comprises a source electrode region, a drain electrode region and a channel region located between the source electrode region and the drain electrode region. The array substrate further comprises a metal light shading layer arranged between the substrate and the active layer. The orthographic projection of the channel region on the substrate is completely covered with the orthographic projection of the metal light shading layer on the substrate, and the metal light shading layer at least covers partial of the source electrode region and partial of the drain electrode region. The method is used for preparing the array substrate.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a preparation method thereof, and a display device. Background technique [0002] Low Temperature Poly-Silicon-Thin Film Transistor (LTPS-TFT for short) displays have the advantages of high resolution, fast response, high brightness, high aperture ratio, and high electron mobility. [0003] At present, a low-temperature polysilicon thin film transistor includes an active layer, a gate insulating layer, a gate electrode, a source electrode, and a drain electrode arranged on a substrate; the active layer includes a source region, a drain region, and a and the channel region between the drain region. In order to avoid leakage current generated by light irradiating the channel region of the active layer and affecting the electrical performance of the polysilicon thin film transistor, a metal light-shielding layer needs to be provided at a position corres...

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Problems solved by technology

[0005] However, due to the existence of the metal light-shielding layer, the heat dissipation rate of the source region and the drain region is very slow compared with that of the channel region. When excimer laser annealing converts amorphous silicon into polysilicon, the channel region has crystallized , but the source and drain regions have not yet reached the crystallization temperature, resulting in small grain size, poor grain uniformity, and low crystallization quality, which limits the improvement of the electrical performance of thin-film transistor devices

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