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Semiconductor device, manufacturing method thereof, and electronic device including same

A semiconductor and integrated technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, circuits, etc., can solve problems such as difficulty in stacking multiple vertical devices, difficulty in controlling gate length, increase in channel resistance, etc., to improve device performance , Reduce the effect of parasitic capacitance and low leakage current

Active Publication Date: 2019-03-29
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, for vertical devices, it is difficult to control the gate length, especially for single crystal channel materials
On the other hand, if a polycrystalline channel material is used, the channel resistance is greatly increased compared to single crystal material, making it difficult to stack multiple vertical devices, as this would result in an excessively high resistance

Method used

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  • Semiconductor device, manufacturing method thereof, and electronic device including same
  • Semiconductor device, manufacturing method thereof, and electronic device including same
  • Semiconductor device, manufacturing method thereof, and electronic device including same

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Embodiment Construction

[0012] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. It should be understood, however, that these descriptions are exemplary only, and are not intended to limit the scope of the present disclosure. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts of the present disclosure.

[0013] Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. The figures are not drawn to scale, with certain details exaggerated and possibly omitted for clarity of presentation. The shapes of the various regions and layers shown in the figure, as well as their relative sizes and positional relationships are only exemplary, and may deviate due to manufacturing tolerances or technical limitations in practice, and those skilled in the art will Regions / layers with different shapes, ...

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Abstract

Disclosed are a semiconductor arrangement, a method of manufacturing the same, and an electronic device including the same. According to an embodiment, a semiconductor arrangement may include a first semiconductor device and a second semiconductor device sequentially stacked on a substrate. Each of the first semiconductor device and the second semiconductor device may include: a first source / drain layer, a channel layer, and a second source / drain layer stacked in sequence, wherein the channel layer includes the first and second source / drain layers. a different semiconductor material for the drain layer; and a gate stack formed around the periphery of the channel layer.

Description

technical field [0001] The present disclosure relates to the field of semiconductors, and in particular, to a vertical type semiconductor arrangement, a method of manufacturing the same, and an electronic device including such a semiconductor arrangement. Background technique [0002] In a horizontal type device such as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), the source, gate and drain are arranged in a direction substantially parallel to the surface of the substrate. Due to this arrangement, the horizontal type device cannot be easily further scaled down. Unlike this, in a vertical type device, the source, gate, and drain are arranged in a direction substantially perpendicular to the substrate surface. Therefore, vertical devices are easier to scale down than horizontal devices. [0003] However, for vertical devices, it is difficult to control the gate length, especially for single crystal channel materials. On the other hand, if a polycrystalline ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/088H01L21/8234
CPCH01L21/8234H01L21/823437H01L21/823487H01L27/088H01L21/8221H01L21/823418H01L21/823425H01L21/823475H01L27/0688H01L29/165H01L29/7827H01L29/7848H01L29/78618H01L29/78642H01L29/78684H01L21/2255H01L21/3065H01L21/3081H01L29/04
Inventor 朱慧珑
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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